Packaging application data and logic for offline support
    13.
    发明授权
    Packaging application data and logic for offline support 有权
    包装应用数据和逻辑用于离线支持

    公开(公告)号:US09292364B1

    公开(公告)日:2016-03-22

    申请号:US14494457

    申请日:2014-09-23

    CPC classification number: G06F9/542

    Abstract: A technique is described providing offline support to business applications. Offline support allows a business application running on a portable electronic device without connectivity to a backend server to operate as though the business application has access to a backend server. The technique receives a client request to operate the application in an offline mode. The technique then retrieves a business object to be utilized in the offline mode and an event trigger for interacting with the business object. The native programming language is then determined and then an event handler written in a native language of the client device and that is associated with the event trigger is retrieved. The event trigger is then modified to point to the event handler. The business object, event trigger, and event handler are then packaged together.

    Abstract translation: 描述了一种提供对业务应用程序的离线支持的技术。 离线支持允许在便携式电子设备上运行的业务应用程序,而无需连接到后端服务器,就像业务应用程序可以访问后端服务器一样进行操作。 该技术接收客户端请求以在离线模式下操作应用程序。 然后,该技术检索要在离线模式中使用的业务对象和用于与业务对象交互的事件触发器。 然后确定本地编程语言,然后检索用客户端设备的本机语言编写并与事件触发相关联的事件处理程序。 然后将事件触发器修改为指向事件处理程序。 然后将业务对象,事件触发器和事件处理程序打包在一起。

    Method for manufacturing thin crystalline solar cells pre-assembled on a panel
    14.
    发明申请
    Method for manufacturing thin crystalline solar cells pre-assembled on a panel 审中-公开
    制造预先组装在面板上的薄晶体太阳能电池的方法

    公开(公告)号:US20110056532A1

    公开(公告)日:2011-03-10

    申请号:US12556357

    申请日:2009-09-09

    Abstract: A method for fabricating a photovoltaic (PV) cell panel wherein each of a plurality of silicon donor wafers has a separation layer formed on its upper surface, e.g., porous anodically etched silicon. On each donor wafer, a PV cell is then partially completed including at least part of inter-cell interconnect, after which plural donor wafers are laminated to a backside substrate or frontside. All of the donor wafers are then separated from the partially completed PV cells in an exfoliation process, followed by simultaneous completion of the remaining PV cell structures on PV cells. Finally, a second lamination to a frontside glass or a backside panel completes the PV cell panel. The separated donor wafers may be reused in forming other PV cells. Use of epitaxial deposition to form the layers of the PV cells enables improved dopant distributions and sharper junction profiles for improved PV cell efficiency.

    Abstract translation: 一种用于制造光伏(PV)电池板的方法,其中多个硅供体晶片中的每一个具有在其上表面上形成的分离层,例如多孔阳极蚀刻的硅。 在每个施主晶片上,PV单元然后部分地完成,包括至少部分单元间互连,之后将多个施主晶片层压到背面基板或前侧。 然后将所有供体晶片在剥离过程中与部分完成的PV电池分离,随后在PV电池上同时完成剩余的PV电池结构。 最后,向前侧玻璃或后侧面板的第二层压完成PV电池面板。 分离的供体晶片可以重新用于形成其它PV电池。 使用外延沉积来形成PV电池的层可以改善掺杂剂分布和更清晰的接线图,以提高PV电池效率。

    OPTIMIZED MRI STRIP ARRAY DETECTORS AND APPARATUS, SYSTEMS AND METHODS RELATED THERETO
    15.
    发明申请
    OPTIMIZED MRI STRIP ARRAY DETECTORS AND APPARATUS, SYSTEMS AND METHODS RELATED THERETO 有权
    优化的MRI条带阵列检测器及其相关的设备,系统和方法

    公开(公告)号:US20110037468A1

    公开(公告)日:2011-02-17

    申请号:US12879430

    申请日:2010-09-10

    CPC classification number: G01R33/3415 G01R33/3678

    Abstract: Featured is a device for NMR or MRI signals from excited nuclei as well as related apparatus, systems and methods. The device includes a strip array antenna including one or more conductor and N reactive tuning components, where N is an integer≧1 at least one of the N reactive components is electrically coupled to each of the one or more conductors as well as to ground/virtual ground. The apparent electrical length of the conductors is tuned with the reactive tuning components so it is equal to be about nλ/4, where n is an integer≧1 and λ is the wavelength of the signal to be detected. The length of the strip also is such as to be substantially in the approximate range of 1.3 times the depth of interest. The strip conductors are also combined with loop coils to form quadrature detectors.

    Abstract translation: 特色是用于激发核的NMR或MRI信号以及相关设备,系统和方法的设备。 该装置包括带状阵列天线,其包括一个或多个导体和N个非反应调谐组件,其中N是整数≥1,N个无功分量中的至少一个电耦合到一个或多个导体中的每一个以及接地/ 虚拟地面。 导体的表观电长度用无功调谐分量进行调谐,因此等于大约nλ/ 4,其中n是整数≧1,λ是待检测信号的波长。 条的长度也基本上在感兴趣深度的1.3倍的近似范围内。 带状导体也与环形线圈组合以形成正交检测器。

    Probe Arrays and Method for Making
    16.
    发明申请
    Probe Arrays and Method for Making 审中-公开
    探针阵列和制作方法

    公开(公告)号:US20080105355A1

    公开(公告)日:2008-05-08

    申请号:US11929597

    申请日:2007-10-30

    Abstract: Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

    Abstract translation: 本发明的实施例涉及在临时衬底上形成微探针(即柔性电气或电子接触元件),切割单独的探针阵列,然后将阵列转移到空间变压器或其它永久衬底。 在将探针从其上形成探针的临时基底分离出来之前,本发明的一些实施方案将探针转移到永久性基底上,而其他实施方案相反。 一些实施例,在转移之前去除牺牲材料,而其它实施例在转移后去除牺牲材料。 一些实施例涉及使用一个或多个具有增强的纵横比(即,高度与宽度比)的焊料凸块来将第一和第二电气部件接合在一起,这是由于至少部分地由保持材料的环围绕凸块而得到的。 保留材料可以用作焊接掩模材料。

    Microprobe tips and methods for making
    17.
    发明申请
    Microprobe tips and methods for making 审中-公开
    微型笔尖和制作方法

    公开(公告)号:US20060053625A1

    公开(公告)日:2006-03-16

    申请号:US11177798

    申请日:2005-07-07

    Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate. Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of the tip material around carefully sized and placed etching shields, via hot pressing, and the like.

    Abstract translation: 本发明的实施例涉及形成具有各种构造的微探针尖元件。 在一些实施例中,尖端由与探针本身相同的建筑材料形成,而在其它实施例中,尖端可以由不同的材料形成和/或可以包括涂层材料。 在一些实施例中,尖端在探针的主要部分之前形成,并且尖端形成在临时衬底附近或与临时衬底接触。 探针尖端图案化可以以各种不同的方式发生,包括例如通过在各向异性或各向异性地蚀刻硅的图案化孔中模制,通过在曝光的光致抗蚀剂中形成的空隙中模制,通过在牺牲材料中的空隙中模制, 由于牺牲材料通过电介质材料的细小尺寸和定位的区域,经由热压等等仔细地尺寸和放置的蚀刻屏蔽部分上的尖端材料的各向同性蚀刻而形成。

    Electrochemical fabrication methods for producing multilayer structures including the use of diamond machining in the planarization of deposits of material
    18.
    发明申请
    Electrochemical fabrication methods for producing multilayer structures including the use of diamond machining in the planarization of deposits of material 审中-公开
    用于生产多层结构的电化学制造方法,包括在平坦化材料沉积中使用金刚石加工

    公开(公告)号:US20050202180A1

    公开(公告)日:2005-09-15

    申请号:US11029165

    申请日:2005-01-03

    Abstract: Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures are disclosed which include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which are useful in Electrochemical fabrication and which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb), where the first material or materials are the structural materials and the second is the sacrificial material). Some embodiments focus on methods for reducing tool wear when using diamond machining to planarize structures being electrochemically fabricated using difficult-to-machine materials (e.g. by depositing difficult to machine material selectively and potentially with little excess plating thickness, and/or pre-machining depositions to within a small increment of desired surface level (e.g. using lapping or a rough cutting operation) and then using diamond fly cutting to complete he process, and/or forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.

    Abstract translation: 公开了用于形成单层和多层中尺度和微结构的电化学制造方法,其包括使用金刚石加工(例如飞切或车削)来平坦化层。 一些实施例集中于可用于电化学制造的牺牲和结构材料的系统,并且可以以最小的工具磨损(例如Ni-P和Cu,Au和Cu,Cu和Sn,Au和Cu,Au和Sn, 和Au和Sn-Pb),其中第一材料或材料是结构材料,第二材料是牺牲材料)。 一些实施例着重于在使用金刚石加工以平面化使用难以加工的材料进行电化学制造的结构(例如,通过沉积难以机械材料选择性且潜在地具有少量多余电镀厚度和/或预加工沉积 到所需表面水平的小增量(例如使用研磨或粗切割操作),然后使用金刚石飞切切割来完成其加工,和/或从硬质材料的薄壁区域形成结构或部分结构 而不是结构材料的宽固体区域。

    Electrochemical fabrication process for forming multilayer multimaterial microprobe structures
    19.
    发明申请
    Electrochemical fabrication process for forming multilayer multimaterial microprobe structures 审中-公开
    用于形成多层多材料微探针结构的电化学制造工艺

    公开(公告)号:US20050189959A1

    公开(公告)日:2005-09-01

    申请号:US11029182

    申请日:2005-01-03

    Abstract: Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.

    Abstract translation: 本发明的一些实施方案涉及由芯材料和部分涂覆探针的表面的材料形成的微针的电化学制造。 其它实施方案涉及由核心材料形成的微结构的电化学制造,以及完全涂覆形成探针的每个层的表面的材料,包括中间层区域。 这些前两组实施例在形成每个层期间都包括芯材料和涂层材料。 另外的其它实施例涉及在后层形成涂覆过程中由电介质材料部分封装的微探针阵列的电化学制造。 在甚至进一步的实施方案中,来自两种或更多种材料的微结构的电化学制造可以通过在结构的每一层周围并入涂层材料而不将涂层材料定位在层间区域中而进行。

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