公开(公告)号：US07294910B2

公开(公告)日：2007-11-13

申请号：US10519444

申请日：2003-06-30

申请人： Jochen Thomas ,  Ingo Wennemuth

发明人： Jochen Thomas ,  Ingo Wennemuth

IPC分类号： H01L23/552

CPC分类号： H01L24/32 ,  B82Y10/00 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/48 ,  H01L24/50 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00012

摘要： The invention relates to an electronic component having a multilayered rewiring plate, which carries a circuit chip, in particular a magnetic memory chip, and connects contact areas of the chip to external contacts of the electronic component via rewiring lines. The rewiring plate has at least one patterned, magnetic shielding layer made of an amorphous metal or an amorphous metal alloy. Furthermore, the invention encompasses a method for producing this electronic component.

摘要翻译： 本发明涉及具有多层重新布线板的电子部件，其具有电路芯片，特别是磁性存储器芯片，并且通过再布线将芯片的接触区域连接到电子部件的外部触点。 再配线板具有至少一个由无定形金属或无定形金属合金制成的图案化磁屏蔽层。 此外，本发明包括用于制造该电子部件的方法。

公开(公告)号：US20050098870A1

公开(公告)日：2005-05-12

申请号：US10927952

申请日：2004-08-27

申请人： Jochen Thomas ,  Juergen Grafe ,  Ingo Wennemuth ,  Minka Gospodinova-Daltcheva ,  Maksim Kuzmenka

发明人： Jochen Thomas ,  Juergen Grafe ,  Ingo Wennemuth ,  Minka Gospodinova-Daltcheva ,  Maksim Kuzmenka

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/02

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The invention relates to an FBGA arrangement, comprising a substrate on which at least one chip is chip-bonded face-down, which has a central row of bonding pads connected to contact islands (landing pads) on the substrate by a bonding channel in the substrate via wire bridges, which substrate, for its part, is provided with soldering balls—arranged in an array—for contact connection to a printed circuit board, and the contact islands and the soldering balls being connected to one another via a rewiring of the substrate. The preferred embodiment of the invention is intended to provide an FBGA arrangement which supports the center pad row technology and at the same time has low electrical parasitics. This is achieved by virtue of the fact that at least two substrates (1, 2) are provided, the substrates (1, 2) are provided substratewise in each case with bonding channels (3, 4) having different dimensions, in a manner forming a multistage bonding channel, the bonding channels (3) in the ball-side substrate (2) having larger dimensions than those in the chip-side substrate (1).

摘要翻译： 本发明涉及一种FBGA布置，其包括基板，其上至少一个芯片正面朝下地被芯片接合，该基板具有通过所述基板中的接合通道连接到所述基板上的接触岛（着陆焊盘）的中心排的接合焊盘 衬底通过导线桥接器，该衬底为其部分设置有排列成阵列的焊球，用于与印刷电路板的接触连接，并且接触岛和焊球通过重新布线 基质。 本发明的优选实施例旨在提供一种支持中心焊盘行技术并同时具有低电寄生效应的FBGA布置。 这是通过提供至少两个基板（1,2）的事实来实现的，基板（1,2）以每种形式设置成具有不同尺寸的接合通道（3,4），以形成 多级接合通道，所述球侧基板（2）中的接合通道（3）的尺寸大于所述芯片侧基板（1）的尺寸。

公开(公告)号：US08624372B2

公开(公告)日：2014-01-07

申请号：US11466279

申请日：2006-08-22

申请人： Wolfgang Hetzel ,  Jochen Thomas ,  Peter Weitz ,  Ingo Wennemuth

发明人： Wolfgang Hetzel ,  Jochen Thomas ,  Peter Weitz ,  Ingo Wennemuth

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor component (10) has an interposer substrate (1) as stack element of a semiconductor component stack (25). The interposer substrate (1) has, on one of the interposer substrate sides (2, 4), a semiconductor chip protected by plastics composition (12) in its side edges (22). An interposer structure (3) partly covered by a plastics composition (12) is arranged on the interposer side (2, 4) opposite to the semiconductor chip (6). Edge regions (11) of the interposer substrate (1) remain free of any plastics composition (12) and have, on both interposer sides (2, 4) external contact pads (7) which are electrically connected to one another via through contacts (8).

摘要翻译： 半导体部件（10）具有作为半导体部件堆叠（25）的堆叠元件的插入基板（1）。 所述插入器基板（1）在所述插入器基板侧（2,4）中的一个上具有在其侧边缘（22）中被塑料组合物（12）保护的半导体芯片。 在与半导体芯片（6）相对的插入器侧（2,4）上布置有由塑料组合物（12）部分覆盖的插入件结构（3）。 插入器基板（1）的边缘区域（11）保持不含任何塑料组合物（12），并且在两个插入件侧（2,4）上通过接触件彼此电连接的外部接触焊盘（7） 8）。

公开(公告)号：US08350364B2

公开(公告)日：2013-01-08

申请号：US11928941

申请日：2007-10-30

申请人： Harry Hedler ,  Ingo Wennemuth

发明人： Harry Hedler ,  Ingo Wennemuth

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connections being provided in the form of structured conductive tracks for providing an electrical connection from the active front face to the passive rear face. An electronic assembly formed of stacked semiconductor chips, and a method for producing the electronic component and the electronic assembly are also provided.

公开(公告)号：US07342320B2

公开(公告)日：2008-03-11

申请号：US10132826

申请日：2002-04-25

申请人： Harry Hedler ,  Ingo Wennemuth

发明人： Harry Hedler ,  Ingo Wennemuth

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connections being provided in the form of structured conductive tracks for providing an electrical connection from the active front face to the passive rear face. An electronic assembly formed of stacked semiconductor chips, and a method for producing the electronic component and the electronic assembly are also provided.

摘要翻译： 电子部件包括具有主动前表面和被动后表面的半导体芯片，分别设置在主动前表面和/或被动后表面上的接触连接和接触表面，并且导电连接以形式 的结构化导电轨道，用于提供从主动前表面到被动后表面的电连接。 还提供了由层叠的半导体芯片形成的电子组件，以及用于制造电子部件和电子组件的方法。

公开(公告)号：US20080048299A1

公开(公告)日：2008-02-28

申请号：US11928941

申请日：2007-10-30

申请人： Harry Hedler ,  Ingo Wennemuth

发明人： Harry Hedler ,  Ingo Wennemuth

IPC分类号： H01L23/48 ,  H01L21/30 ,  H01L21/60

CPC分类号： H01L23/481 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connections being provided in the form of structured conductive tracks for providing an electrical connection from the active front face to the passive rear face. An electronic assembly formed of stacked semiconductor chips, and a method for producing the electronic component and the electronic assembly are also provided.

摘要翻译： 电子部件包括具有主动前表面和被动后表面的半导体芯片，分别设置在主动前表面和/或被动后表面上的接触连接和接触表面，并且导电连接以形式 的结构化导电轨道，用于提供从主动前表面到被动后表面的电连接。 还提供了由层叠的半导体芯片形成的电子组件，以及用于制造电子部件和电子组件的方法。

公开(公告)号：US07198979B2

公开(公告)日：2007-04-03

申请号：US10701742

申请日：2003-11-04

申请人： Jochen Thomas ,  Wolfgang Hetzel ,  Ingo Wennemuth

发明人： Jochen Thomas ,  Wolfgang Hetzel ,  Ingo Wennemuth

IPC分类号： H01L21/00 ,  H01L21/46 ,  H01L21/44 ,  H01L23/02 ,  H01L29/40

CPC分类号： H01L23/3157 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of stacking semiconductor chips includes providing four semiconductor chips that each include a top surface with central bond pads. Each of the bond pads is electrically coupled to second bond pads located in a peripheral portion of the semiconductor chip through a conductive layer. The first and the second semiconductor chips are arranged alongside one another on a carrier substrate. The second bond pads from the first and second semiconductor chips are bonded to corresponding landing pads on the substrate. The third semiconductor chip is then stacked over the first semiconductor chip and the fourth semiconductor chip over the second semiconductor chip. The second bond pads of the third and fourth semiconductor chips can then be bonded to contact pads of the substrate. The substrate can then be separated into a first stack that includes the first and third semiconductor chips and a second stack that includes the second and fourth semiconductor chips.

摘要翻译： 堆叠半导体芯片的方法包括提供四个半导体芯片，每个半导体芯片包括具有中心焊盘的顶表面。 每个接合焊盘通过导电层电耦合到位于半导体芯片的周边部分中的第二接合焊盘。 第一和第二半导体芯片彼此并排地布置在载体衬底上。 来自第一和第二半导体芯片的第二接合焊盘被结合到衬底上的相应的着陆焊盘。 然后将第三半导体芯片堆叠在第二半导体芯片上方的第一半导体芯片和第四半导体芯片上。 然后可以将第三和第四半导体芯片的第二接合焊盘接合到衬底的接触焊盘。 然后可以将衬底分离成包括第一和第三半导体芯片的第一堆叠以及包括第二和第四半导体芯片的第二堆叠。

公开(公告)号：US06768191B2

公开(公告)日：2004-07-27

申请号：US10217185

申请日：2002-08-12

申请人： Ingo Wennemuth ,  Jochen Thomas

发明人： Ingo Wennemuth ,  Jochen Thomas

IPC分类号： H01L2302

CPC分类号： H01L23/3114 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48472 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/15311 ,  H01L2924/16152 ,  H05K1/141 ,  H05K1/144 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/10734 ,  H05K2203/302 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic component includes stacked electronic elements with external contacts. The external contacts are connected to contact terminal pads of an interconnect layer disposed on an isolating body. This isolating body extends over underlying side edges of a further electronic element, and its interconnect layer is connected to another interconnect layer of the stack via its external contact surfaces.

摘要翻译： 电子部件包括具有外部触点的堆叠电子元件。 外部触点连接到布置在隔离体上的互连层的接触端子焊盘。 该隔离体在另一电子元件的下侧边缘上延伸，并且其互连层经由其外部接触表面连接到堆叠的另一互连层。

公开(公告)号：US07781900B2

公开(公告)日：2010-08-24

申请号：US11630930

申请日：2005-06-09

申请人： Manuel Carmona ,  Anton Legen ,  Ingo Wennemuth

发明人： Manuel Carmona ,  Anton Legen ,  Ingo Wennemuth

IPC分类号： H01L23/29 ,  H01L23/28

CPC分类号： H01L23/427 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/00

摘要： One aspect of the invention relates to a semiconductor device including a housing and a semiconductor chip partly embedded in a plastic housing composition. Another aspect relates to a method for producing the same. The plastic housing composition has at least one host component having a softening temperature and an incorporated component having a phase change temperature. In this case, the softening temperature of the host component is greater than the phase change temperature of the incorporated component.

摘要翻译： 本发明的一个方面涉及一种半导体器件，其包括壳体和部分地嵌入在塑料外壳组合物中的半导体芯片。 另一方面涉及其制造方法。 塑料外壳组合物具有至少一种具有软化温度的主体组分和具有相变温度的掺入组分。 在这种情况下，主体成分的软化温度大于引入成分的相变温度。

公开(公告)号：US20080230910A1

公开(公告)日：2008-09-25

申请号：US12054126

申请日：2008-03-24

申请人： Minka Gospodinova-Daltcheva ,  Ingo Wennemuth ,  Hayri Burak Goekgoez

发明人： Minka Gospodinova-Daltcheva ,  Ingo Wennemuth ,  Hayri Burak Goekgoez

IPC分类号： H01L23/52 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/5389 ,  H01L23/60 ,  H01L24/05 ,  H01L24/48 ,  H01L27/0251 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K3/4664 ,  H05K3/4685 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： An integrated circuit provides a carrier substrate, a wiring level above a carrier substrate, wherein the wiring level comprises a first conductor track composed of a first conductive material and a second conductor track composed of the first conductive material, an insulating layer above the wiring level, wherein the insulating layer comprises a first opening in a region of the first conductor track of the wiring level and a second opening in a region of the second conductor track of the wiring level and a contact bridge composed of a second conductive material, wherein the contact bridge is connected to the first conductor track in a region of the first opening and is connected to the second conductor track in a region of the second opening.

摘要翻译： 集成电路提供载体衬底，载体衬底上的布线层，其中布线层包括由第一导电材料构成的第一导体轨道和由第一导电材料构成的第二导体轨道，布线层上方的绝缘层 ，其中所述绝缘层包括布线层的第一导体轨道的区域中的第一开口和布线层的第二导体轨道的区域中的第二开口和由第二导电材料构成的接触桥，其中， 接触桥在第一开口的区域中连接到第一导体轨道，并且在第二开口的区域中连接到第二导体轨道。