公开(公告)号：US08076786B2

公开(公告)日：2011-12-13

申请号：US12501693

申请日：2009-07-13

Applicant: Chang Ying Hung ,  Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Jian Cheng Chen ,  Wei Chi Yih ,  Ho Ming Tong

Inventor： Chang Ying Hung ,  Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Jian Cheng Chen ,  Wei Chi Yih ,  Ho Ming Tong

IPC: H01L23/488

CPC classification number: H01L24/85 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/92247 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distribution layer has a first end and a second end, and the first end is electrically connected to the first metallic pad. The second metallic pad is electrically connected to the second end of the re-distribution layer. The bonding wire is bonded to the second metallic pad.

Abstract translation: 引线键合结构包括芯片和接合线。 芯片包括基材，至少一个第一金属垫，再分布层和至少一个第二金属垫。 第一金属垫设置在基材上。 再分布层具有第一端和第二端，并且第一端电连接到第一金属垫。 第二金属垫电连接到再分配层的第二端。 接合线接合到第二金属垫。

公开(公告)号：US20110090659A1

公开(公告)日：2011-04-21

申请号：US12856389

申请日：2010-08-13

Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen

Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen

IPC: H05K7/02 ,  H05K3/10

CPC classification number: H05K9/0022 ,  H01L23/552 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/09972 ,  H05K2203/1316 ,  Y10T29/49146 ,  H01L2224/81

Abstract: The present invention relates to a package having an inner shield and a method for making the same. The package includes a substrate, a plurality of electrical elements, a molding compound, an inner shield and a conformal shield. The electrical elements are disposed on the substrate. The molding compound is disposed on a surface of the substrate, encapsulates the electrical elements, and includes at least one groove. The groove penetrates a top surface and a bottom surface of the molding compound and is disposed between the electrical elements, and there is a gap between a short side of the groove and a side surface of the molding compound. The inner shield is disposed in the groove and electrically connected to the substrate. The conformal shield covers the molding compound and a side surface of the substrate, and electrically connects the substrate and the inner shield. Therefore, the inner shield enables the electrical elements to have low electromagnetic interference and high electromagnetic compatibility.

Abstract translation: 本发明涉及具有内屏蔽的封装及其制造方法。 封装包括基板，多个电气元件，模塑料，内护罩和保形罩。 电气元件设置在基板上。 模塑料被设置在基板的表面上，封装电气元件，并且包括至少一个凹槽。 凹槽穿过模制化合物的顶表面和底表面并且设置在电气元件之间，并且在凹槽的短边和模塑料的侧表面之间存在间隙。 内屏蔽件设置在凹槽中并电连接到基板。 共形屏蔽覆盖模塑料和基板的侧表面，并且电连接基板和内屏蔽。 因此，内部屏蔽使得电气元件具有低电磁干扰和高电磁兼容性。

公开(公告)号：US20100207259A1

公开(公告)日：2010-08-19

申请号：US12770645

申请日：2010-04-29

Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC: H01L23/552 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element.

Abstract translation: 这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。 在一个实施例中，半导体器件封装包括邻近衬底单元的周边设置并至少部分地在衬底单元的上表面和下表面之间延伸的接地元件。 接地元件包括与衬底单元的侧表面相邻设置的凹入部分。 半导体器件封装还包括EMI屏蔽，其电连接到接地元件并且与接地元件的凹入部分相邻地向内凹陷。

公开(公告)号：US20070266152A1

公开(公告)日：2007-11-15

申请号：US11410762

申请日：2006-04-25

Applicant: Jian-Cheng Chen

Inventor： Jian-Cheng Chen

IPC: G06F15/173

CPC classification number: G06F21/34 ,  G06F2221/2101 ,  G06F2221/2129 ,  G06F2221/2137

Abstract: A method for controlling access to a computer first provides a peripheral device with an identification number, and which is coupled to a computer. Next, the accuracy of the identification number of the coupled peripheral device is verified. Operation of the computer is prevented if the identification number is not correct. On the other hand, if the identification number is correct, a first predetermined time for operation of the computer is counted, and then operation of the computer is prevented after the first predetermined time has elapsed.

Abstract translation: 用于控制对计算机的访问的方法首先为外围设备提供识别号，并且其耦合到计算机。 接下来，验证耦合的外围设备的识别号码的精度。 如果识别号码不正确，则防止计算机的操作。 另一方面，如果识别号码正确，则对计算机的操作的第一预定时间进行计数，然后在经过第一预定时间之后防止计算机的操作。

公开(公告)号：US08522171B1

公开(公告)日：2013-08-27

申请号：US13488147

申请日：2012-06-04

Applicant: Jui-Yun Chang ,  Jian-Cheng Chen ,  I-Jen Kao ,  Chih-Wei Hsu

Inventor： Jui-Yun Chang ,  Jian-Cheng Chen ,  I-Jen Kao ,  Chih-Wei Hsu

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: The invention is directed to a method for checking a die seal ring on a layout. The method comprises steps of receiving a digital database of a layout corresponding to at least a device with a text information corresponding to the layout. Tape-out information corresponding to the layout is received. A checking process is performed according to the digital database of the layout and the tape-out information and, meanwhile, a mask design procedure for designing a mask pattern corresponding to the layout is performed by using the digital database of the layout, the text information and the tape-out information. A result of the checking process is recorded in an inspection table corresponding to the layout.

Abstract translation: 本发明涉及一种用于在布局上检查模具密封环的方法。 该方法包括以下步骤：接收与至少具有对应于布局的文本信息的设备对应的布局的数字数据库。 接收与布局相对应的磁带输出信息。 根据布局的数字数据库和输出信息进行检查处理，同时，通过使用布局的数字数据库，文本信息来执行用于设计与布局相对应的掩模图案的掩模设计过程 和输出信息。 检查处理的结果记录在与布局对应的检查表中。

公开(公告)号：US20120086893A1

公开(公告)日：2012-04-12

申请号：US13031230

申请日：2011-02-20

Applicant: Yao-Jen OU ,  Hang-Lian LEE ,  Jian-Cheng CHEN ,  Bo-Chin TSUEI

Inventor： Yao-Jen OU ,  Hang-Lian LEE ,  Jian-Cheng CHEN ,  Bo-Chin TSUEI

IPC: G02F1/1337 ,  B29C67/00 ,  G02F1/1335

CPC classification number: G02F1/133788

Abstract: A photo alignment process and a liquid crystal display using the same are provided. The photo alignment process includes the following steps. A photo alignment material layer is formed on a substrate. The photo alignment material layer is irradiated by a linearly polarized light. A surface of the photo alignment material layer is a first plane. A wave vector of the linearly polarized light is a K vector. A second plane is constructed from a normal vector of the first plane and the K vector. A polarization direction of the linearly polarized light is neither perpendicular nor parallel to the second plane.

Abstract translation: 提供光取向处理和使用其的液晶显示器。 照片对准过程包括以下步骤。 在基片上形成光取向材料层。 光线取向材料层被线偏振光照射。 光取向材料层的表面是第一平面。 线偏振光的波矢是K矢量。 第二平面由第一平面和K向量的法向量构成。 线偏振光的偏振方向既不垂直也不平行于第二平面。

公开(公告)号：US20120057114A1

公开(公告)日：2012-03-08

申请号：US13084799

申请日：2011-04-12

Applicant: Jian-Cheng CHEN ,  Chih-Yung HSIEH ,  Bo-Chin TSUEI

Inventor： Jian-Cheng CHEN ,  Chih-Yung HSIEH ,  Bo-Chin TSUEI

IPC: G02F1/1337

CPC classification number: G02F1/133707 ,  G02F1/133753 ,  G02F1/134309

Abstract: A liquid crystal display (LCD) structure is provided. A first alignment layer and a first electrode layer are disposed on a liquid crystal layer. A second electrode layer and a second alignment layer disposed under the liquid crystal layer. The first alignment layer and the second alignment layer respectively have a plurality of alignment areas with different aligning directions. At least one of the first electrode layer and the second electrode layer includes a substrate material and a plurality of openings, and at least includes a plurality of electrode areas. The boundaries of the electrode areas correspond to the boundaries of the alignment areas. The directions of the openings in the electrode areas are between the aligning directions of the corresponding alignment areas of the first alignment layer and the second alignment layer.

Abstract translation: 提供了液晶显示（LCD）结构。 第一取向层和第一电极层设置在液晶层上。 设置在液晶层下方的第二电极层和第二取向层。 第一取向层和第二取向膜分别具有不同的取向方向的多个取向区域。 第一电极层和第二电极层中的至少一个包括基板材料和多个开口，并且至少包括多个电极区域。 电极区域的边界对应于对准区域的边界。 电极区域中的开口方向位于第一取向层和第二取向层的对应取向区域的​​对准方向之间。

公开(公告)号：US08018075B2

公开(公告)日：2011-09-13

申请号：US12501309

申请日：2009-07-10

Applicant: Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian Cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung

Inventor： Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian Cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85201 ,  H01L2224/85375 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material. The bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the sectional area of the block portion is bigger than that of the line portion. The pad is bonded to the block portion. The non-conductive adhesive material covers the pad and seals the whole block portion of the bonding wire.

Abstract translation: 半导体封装的引线接合结构包括接合线，焊盘和非导电粘合材料。 接合线包括线部分和块部分，其中块部分物理连接到线部分，并且块部分的截面积大于线部分的截面面积。 焊盘粘合到块部分。 非导电粘合剂材料覆盖焊盘并密封焊丝的整个块部分。

公开(公告)号：US20110157537A1

公开(公告)日：2011-06-30

申请号：US12980738

申请日：2010-12-29

Applicant: Jian-Cheng CHEN ,  Chien-Hong CHEN ,  Chih-Yung HSIEH ,  Wei LO ,  Chun-Hsu LIN ,  Ching-Che YANG ,  Jia-Lun CHEN

Inventor： Jian-Cheng CHEN ,  Chien-Hong CHEN ,  Chih-Yung HSIEH ,  Wei LO ,  Chun-Hsu LIN ,  Ching-Che YANG ,  Jia-Lun CHEN

IPC: G02F1/1333

CPC classification number: G02F1/134336 ,  G02F1/133707 ,  G02F1/133753 ,  G02F1/1393 ,  G02F2001/133796

Abstract: A substrate with a multi-domain vertical alignment pixel structure is provided. The substrate is opposite to a counter substrate with a common electrode, and a liquid crystal layer is disposed between the substrate and the counter substrate. The substrate includes a scan line and a data line, an active device, first and second patterned pixel electrodes and a voltage drop layer. Wherein, the first patterned pixel electrode provides a first electrical field to the liquid crystal layer, and the second patterned pixel electrode provides a second electrical field to the liquid crystal layer. The voltage drop layer makes the first electrical field smaller than the second electrical field.

Abstract translation: 提供具有多域垂直对准像素结构的衬底。 基板与具有公共电极的对置基板相对，并且液晶层设置在基板和对置基板之间。 衬底包括扫描线和数据线，有源器件，第一和第二图案化像素电极和电压降层。 其中，第一图案化像素电极向液晶层提供第一电场，第二图案化像素电极为液晶层提供第二电场。 电压降层使得第一电场小于第二电场。

公开(公告)号：US20100265422A1

公开(公告)日：2010-10-21

申请号：US12758989

申请日：2010-04-13

Applicant: Chien-Hong Chen ,  Jian-Cheng Chen ,  Rung-Nan Lu

Inventor： Chien-Hong Chen ,  Jian-Cheng Chen ,  Rung-Nan Lu

IPC: G02F1/1343 ,  G02F1/133

CPC classification number: G02F1/133707 ,  G02F1/133788 ,  G02F1/134309 ,  G02F2001/133715 ,  G02F2001/133742 ,  G02F2001/133746

Abstract: A liquid crystal (LC) display panel including a lower substrate with pixel structures, an upper substrate, and an LC layer is provided. Each of the pixel structures includes a transistor and a pixel electrode. The pixel electrode includes first and second pixel electrodes insulated from each other, respectively including a first pattern and a second pattern that different and complementary to each other. Each of the first pixel electrode and the second pixel electrode has at least a trunk with a width smaller than or equal to 10 microns and a plurality of branches. The LC layer is positioned between the upper and the lower substrates and includes a plurality of LC molecules and a plurality of polymers, which are formed on surfaces of at least one of the upper and the lower substrates to cause the plurality of LC molecules to have a pretilt angle.

Abstract translation: 提供了包括具有像素结构的下基板，上基板和LC层的液晶（LC）显示面板。 每个像素结构包括晶体管和像素电极。 像素电极包括彼此绝缘的第一和第二像素电极，分别包括彼此不同和互补的第一图案和第二图案。 第一像素电极和第二像素电极中的每一个至少具有宽度小于或等于10微米的躯干和多个分支。 LC层位于上基板和下基板之间，并且包括多个LC分子和多个聚合物，其形成在上基板和下基板中的至少一个的表面上，以使多个LC分子具有 预倾角。