公开(公告)号：US10096455B2

公开(公告)日：2018-10-09

申请号：US14486223

申请日：2014-09-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Thanh Nguyen ,  Rongjun Wang ,  Muhammad M. Rasheed ,  Xianmin Tang

IPC: H01J37/34 ,  C23C14/34 ,  C23C14/56

Abstract: Apparatus for physical vapor deposition are provided. In some embodiments, an apparatus for use in a physical vapor deposition substrate processing chamber includes a process shield having a central opening passing through a body of the process shield and defining a processing volume of the substrate processing chamber, wherein the process shield comprises an annular dark space shield fabricated from a ceramic material and an annular ground shield fabricated from a conductive material, and wherein a ratio of a length of the annular dark space shield to a length of the annular ground shield is about 1:2 to about 1:1.6.

公开(公告)号：US09633839B2

公开(公告)日：2017-04-25

申请号：US14744688

申请日：2015-06-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Weimin Zeng ,  Thanh X. Nguyen ,  Yana Cheng ,  Yong Cao ,  Daniel Lee Diehl ,  Srinivas Guggilla ,  Rongjun Wang ,  Xianmin Tang

IPC: H01L21/02

CPC classification number: H01L21/0234 ,  H01L21/0214 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02266

Abstract: In some embodiments a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) depositing a dielectric layer to a first thickness atop a first surface of the substrate via a physical vapor deposition process; (b) providing a first plasma forming gas to a processing region of the physical vapor deposition process chamber, wherein the first plasma forming gas comprises hydrogen but not carbon; (c) providing a first amount of bias power to a substrate support to form a first plasma from the first plasma forming gas within the processing region of the physical vapor deposition process chamber; (d) exposing the dielectric layer to the first plasma; and (e) repeating (a)-(d) to deposit the dielectric film to a final thickness.

公开(公告)号：US20140238843A1

公开(公告)日：2014-08-28

申请号：US13777010

申请日：2013-02-26

Applicant: APPLIED MATERIALS, INC.

Inventor： Thanh X. Nguyen ,  Rongjun Wang ,  Muhammad M. Rasheed ,  Xianmin Tang

IPC: H01J37/34 ,  C23C14/35

CPC classification number: H01J37/3408 ,  C23C14/35 ,  C23C14/564 ,  H01J37/3288 ,  H01J37/3405 ,  H01J37/3452 ,  H01J37/3455 ,  H01J37/3476

Abstract: A dual magnetron particularly useful for RF plasma sputtering includes a radially stationary open-loop magnetron comprising opposed magnetic poles and rotating about a central axis to scan an outer region of a sputter target and a radially movable open-loop magnetron comprising opposed magnetic poles and rotating together with the stationary magnetron. During processing, the movable magnetron is radially positioned in the outer region with an open end abutting an open end of the stationary magnetron to form a single open-loop magnetron. During cleaning, part of the movable magnetron is moved radially inwardly to scan and clean an inner region of the target not scanned by the stationary magnetron. The movable magnetron can be mounted on an arm pivoting about an axis at periphery of a rotating disk-shaped plate mounting the stationary magnetron so the arm centrifugally moves between radial positions dependent upon the rotation rate or direction.

Abstract translation: 特别适用于RF等离子体溅射的双重磁控管包括径向固定的开环磁控管，其包括相对的磁极并围绕中心轴线旋转以扫描溅射靶的外部区域和包括相对的磁极的可径向移动的开环磁控管 连同固定磁控管。 在处理过程中，可移动磁控管径向定位在外部区域中，开口端与固定磁控管的开口端相接触以形成单个开环磁控管。 在清洁期间，可移动磁控管的一部分径向向内移动以扫描和清洁未被固定磁控管扫描的目标的内部区域。 可移动磁控管可以安装在围绕安装固定磁控管的旋转盘形板的周边处的轴线枢转的臂上，使得臂根据旋转速率或方向离心地在径向位置之间移动。

公开(公告)号：US20240175120A1

公开(公告)日：2024-05-30

申请号：US18512894

申请日：2023-11-17

Applicant: Applied Materials, Inc.

Inventor： Tsung-Han Yang ,  Zhen Liu ,  Yongqian Gao ,  Wenting Hou ,  Rongjun Wang

IPC: C23C16/04 ,  C23C16/06 ,  H01L21/768 ,  H01L23/532

CPC classification number: C23C16/045 ,  C23C16/06 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/53266

Abstract: Embodiments of the disclosure relate to methods for metal gapfill with lower resistivity. Specific embodiments provide methods of forming a tungsten gapfill without a high resistance nucleation layer. Some embodiments of the disclosure utilize a nucleation underlayer to promote growth of the metal gapfill.

公开(公告)号：US11810770B2

公开(公告)日：2023-11-07

申请号：US17490840

申请日：2021-09-30

Applicant: APPLIED MATERIALS, INC.

Inventor： Xiaodong Wang ,  Joung Joo Lee ,  Fuhong Zhang ,  Martin Lee Riker ,  Keith A. Miller ,  William Fruchterman ,  Rongjun Wang ,  Adolph Miller Allen ,  Shouyin Zhang ,  Xianmin Tang

IPC: H01J37/34 ,  C23C14/35 ,  C23C14/34 ,  C23C14/54

CPC classification number: H01J37/3458 ,  C23C14/345 ,  C23C14/351 ,  C23C14/54 ,  H01J37/3402 ,  H01J37/345 ,  H01J37/3405 ,  H01J37/3411 ,  H01J37/3441 ,  H01J37/3447 ,  H01J37/3452 ,  H01J37/3455

Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.

公开(公告)号：US20230187204A1

公开(公告)日：2023-06-15

申请号：US17844189

申请日：2022-06-20

Applicant: Applied Materials, Inc.

Inventor： Xiaodong Wang ,  Kevin Kashefi ,  Rongjun Wang ,  Shi You ,  Keith T. Wong ,  Yuchen Liu ,  Ya-Hsi Hwang ,  Jean Lu

IPC: H01L21/02 ,  H01L21/285

CPC classification number: H01L21/0234 ,  H01L21/28568

Abstract: Provided are methods for pre-cleaning a substrate. A substrate having tungsten oxide (WOx) thereon is soaked in tungsten fluoride (WF6), which reduces the tungsten oxide (WOx) to tungsten (W). Subsequently, the substrate is treated with hydrogen, e.g., plasma treatment or thermal treatment, to reduce the amount of fluorine present so that fluorine does not invade the underlying insulating layer.

公开(公告)号：US11637107B2

公开(公告)日：2023-04-25

申请号：US17351223

申请日：2021-06-17

Applicant: Applied Materials, Inc.

Inventor： Tom Ho Wing Yu ,  Nobuyuki Sasaki ,  Jianxin Lei ,  Wenting Hou ,  Rongjun Wang ,  Tza-Jing Gung

IPC: H01L27/108

Abstract: Bit line stacks and methods of forming bit line stacks are described herein. A bit line stack comprises: a polysilicon layer; an adhesion layer on the polysilicon layer; a barrier metal layer on the adhesion layer; an interface layer on the barrier metal layer; a resistance reducing layer on the interface layer; and a conductive layer on the resistance reducing layer. A bit line stack having the resistance reducing layer has a resistance at least 5% lower than a comparable bit line stack without the resistance reducing layer. The resistance reducing layer may include silicon oxide or silicon nitride. The resistance reducing layer may be formed using one or more of a physical vapor deposition (PVD), a radio frequency-PVD, a pulsed-PVD, chemical vapor deposition (CVD), atomic layer deposition (ALD) or sputtering process.

公开(公告)号：US11542589B2

公开(公告)日：2023-01-03

申请号：US16358465

申请日：2019-03-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Rongjun Wang ,  Xiaodong Wang ,  Chao Du

IPC: C23C14/14 ,  C23C14/34

Abstract: Methods for depositing a dielectric oxide layer atop one or more substrates disposed in or processed through a PVD chamber are provided herein. In some embodiments, such a method includes: sputtering source material from a target assembly onto a first substrate while the source material is at a first erosion state and while providing a first amount of RF power to the target assembly to deposit a dielectric oxide layer onto a first substrate having a desired resistance-area; and subsequently sputtering source material from the target assembly onto a second substrate while the source material is at a second erosion state and while providing a second amount of RF power to the target assembly, wherein the second amount of RF power is lower than the first amount of RF power by a predetermined amount calculated to maintain the desired resistance-area.

公开(公告)号：US20220406788A1

公开(公告)日：2022-12-22

申请号：US17351223

申请日：2021-06-17

Applicant: Applied Materials, Inc.

Inventor： Tom Ho Wing Yu ,  Nobuyuki Sasaki ,  Jianxin Lei ,  Wenting Hou ,  Rongjun Wang ,  Tza-Jing Gung

IPC: H01L27/108

Abstract: Bit line stacks and methods of forming bit line stacks are described herein. A bit line stack comprises: a polysilicon layer; an adhesion layer on the polysilicon layer; a barrier metal layer on the adhesion layer; an interface layer on the barrier metal layer; a resistance reducing layer on the interface layer; and a conductive layer on the resistance reducing layer. A bit line stack having the resistance reducing layer has a resistance at least 5% lower than a comparable bit line stack without the resistance reducing layer. The resistance reducing layer may include silicon oxide or silicon nitride. The resistance reducing layer may be formed using one or more of a physical vapor deposition (PVD), a radio frequency-PVD, a pulsed-PVD, chemical vapor deposition (CVD), atomic layer deposition (ALD) or sputtering process.

公开(公告)号：US11251364B2

公开(公告)日：2022-02-15

申请号：US16773232

申请日：2020-01-27

Applicant: Applied Materials, Inc.

Inventor： Lin Xue ,  Chi Hong Ching ,  Jaesoo Ahn ,  Mahendra Pakala ,  Rongjun Wang

IPC: H01L27/22 ,  H01L43/08 ,  G11C11/16 ,  G11C11/15 ,  H01L21/768 ,  H01L45/00 ,  H01L27/24 ,  G11B5/31 ,  G11B5/39

Abstract: Embodiments herein provide film stacks that include a buffer layer; a synthetic ferrimagnet (SyF) coupling layer; and a capping layer, wherein the capping layer comprises one or more layers, and wherein the capping layer, the buffer layer, the SyF coupling layer, or a combination thereof, is not fabricated from Ru.