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231 条记录 (耗时 0.027 秒)

    Semiconductor Package and Method for Making the Same
    11.
    发明申请
    Semiconductor Package and Method for Making the Same 有权
    半导体封装及其制作方法

    公开(公告)号：US20110156246A1

    公开(公告)日：2011-06-30

    申请号：US12796279

    申请日：2010-06-08

    申请人： Chien-Hua Chen ,  Teck-Chong Lee

    发明人： Chien-Hua Chen ,  Teck-Chong Lee

    IPC分类号： H01L25/16 ,  H01L21/50

    CPC分类号： H01L28/40 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/642 ,  H01L23/645 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a substrate, a first capacitor, a first protective layer, a first metal layer and a second protective layer. The substrate has at least one via structure. The first capacitor is disposed on a first surface of the substrate. The first protective layer encapsulates the first capacitor. The first metal layer is disposed on the first protective layer, and includes a first inductor. The second protective layer encapsulates the first inductor. Whereby, the first inductor, the first capacitor and the via structure are integrated into the semiconductor package, so that the size of the product is reduced.

    摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括衬底，第一电容器，第一保护层，第一金属层和第二保护层。 衬底具有至少一个通孔结构。 第一电容器设置在基板的第一表面上。 第一保护层封装第一电容器。 第一金属层设置在第一保护层上，并且包括第一电感器。 第二保护层封装第一电感器。 由此，第一电感器，第一电容器和通孔结构被集成到半导体封装中，使得产品的尺寸减小。

    Micro electrical mechanical system
    15.
    发明授权
    Micro electrical mechanical system 有权
    微机电系统

    公开(公告)号：US08497577B2

    公开(公告)日：2013-07-30

    申请号：US11870306

    申请日：2007-10-10

    申请人： Chien-Hua Chen ,  David M. Craig ,  Charles C. Haluzak

    发明人： Chien-Hua Chen ,  David M. Craig ,  Charles C. Haluzak

    IPC分类号： H01L23/12

    CPC分类号： B81B7/007 ,  H01L2924/16235

    摘要： An apparatus includes a Micro Electrical Mechanical System (MEMS) having electrical contacts and a MEMS device in electrical communication with the electrical contacts. A lid is oriented over the MEMS device and not the electrical contacts. The lid has a base region and a top region, the base region being wider in dimension than the top region and oriented in closer proximity to the MEMS device than the top region.

    摘要翻译： 一种装置包括具有电触头的微机电系统（MEMS）和与电触头电连通的MEMS装置。 盖子定位在MEMS器件上，而不是电触头。 盖子具有基部区域和顶部区域，基底区域的尺寸比顶部区域宽，并且被定向成比顶部区域更靠近MEMS装置。

    MICRO DEVICE PACKAGING
    17.
    发明申请
    MICRO DEVICE PACKAGING 审中-公开
    微型设备包装

    公开(公告)号：US20120012963A1

    公开(公告)日：2012-01-19

    申请号：US13145493

    申请日：2009-02-27

    申请人： Zhuqing Zhang ,  Steve P. Hanson ,  Chien-Hua Chen

    发明人： Zhuqing Zhang ,  Steve P. Hanson ,  Chien-Hua Chen

    IPC分类号： H01L31/0216

    CPC分类号： G02B5/284 ,  B81B2201/0292 ,  B81B2201/047 ,  B81C1/00888 ,  G02B1/11 ,  H01L2924/16235

    摘要： In one embodiment, a method for making an optical micro device package includes: providing a substrate wafer having a plurality of solid state light sensors integrate therein; providing a transparent cover wafer coated with a material that alters the transparency characteristics of the cover wafer; forming a layer of light sensitive, photo definable adhesive material on the substrate wafer; selectively removing part of the layer of adhesive material in a pattern for a plurality of adhesive spacers between the substrate wafer and the cover wafer with each spacer surrounding a corresponding one of the light sensors; bonding the substrate wafer and the cover wafer together at the spacers to form a wafer assembly in which each spacer surrounds and seals a corresponding one of the light sensors within a cavity bounded by a spacer and the two wafers; and singulating individual device packages from the wafer assembly.

    摘要翻译： 在一个实施例中，一种用于制造光学微器件封装的方法包括：提供具有集成在其中的多个固态光传感器的衬底晶片; 提供涂覆有改变覆盖晶片的透明特性的材料的透明盖晶片; 在衬底晶片上形成一层光敏的可光定义粘合剂材料; 在衬底晶片和覆盖晶片之间的多个粘合剂间隔物的图案中选择性地去除粘合剂材料层的一部分，每个间隔物环绕相应的一个光传感器; 将衬底晶片和覆盖晶片在间隔件处结合在一起以形成晶片组件，其中每个间隔件在由间隔件和两个晶片限定的空腔内围绕并密封相应的一个光传感器; 以及从晶片组件分离单个器件封装。

    Fabrication tool for bonding
    19.
    发明授权
    Fabrication tool for bonding 有权
    用于粘接的加工工具

    公开(公告)号：US07866364B2

    公开(公告)日：2011-01-11

    申请号：US11413333

    申请日：2006-04-28

    申请人： Chien-Hua Chen ,  Troy D. Schwinabart ,  William M. Atkinson

    发明人： Chien-Hua Chen ,  Troy D. Schwinabart ,  William M. Atkinson

    IPC分类号： G02B6/00

    CPC分类号： H01L21/67092

    摘要： A fabrication tool presses a first device surface against a second device surface after the first and the second device surfaces have been plasma activated, to bond the first device surface with the second device surface. The fabrication tool includes a bonding piston to exert force on the first device surface to press the first device surface against the second device surface. The fabrication tool also includes a pressure plate situated between the bonding piston and the first device surface. The fabrication tool further includes a mechanism to ensure that the force exerted by the bonding piston on the first device surface via the pressure plate is initially exerted at one or more first locations on the first device surface and subsequently exerted at one or more second locations on the first device surface.

    摘要翻译： 在第一和第二装置表面已被等离子体激活之后，制造工具将第一装置表面压靠第二装置表面，以将第一装置表面与第二装置表面结合。 制造工具包括粘合活塞，以在第一装置表面施加力以将第一装置表面压靠第二装置表面。 制造工具还包括位于接合活塞和第一装置表面之间的压力板。 制造工具还包括机构，以确保由第一装置表面经由压板施加的结合活塞的力最初施加在第一装置表面上的一个或多个第一位置上，随后在一个或多个第二位置上施加 第一个设备表面。

    Silicon Chip Having Through Via and Method for Making the Same
    20.
    发明申请
    Silicon Chip Having Through Via and Method for Making the Same 有权
    通过硅片和其制造方法

    公开(公告)号：US20100230759A1

    公开(公告)日：2010-09-16

    申请号：US12647856

    申请日：2009-12-28

    申请人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    发明人： Hsueh-An Yang ,  Pei-Chun Chen ,  Chien-Hua Chen

    IPC分类号： H01L23/48 ,  H01L27/092 ,  H01L21/768

    CPC分类号： H01L21/76898

    摘要： The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit. Therefore, a lower resolution process can be used, which results in low manufacturing cost and simple manufacturing process.

    摘要翻译： 本发明涉及具有贯通孔的硅芯片及其制造方法。 硅芯片包括硅衬底，钝化层，至少一个电器件和至少一个通孔。 钝化层设置在硅衬底的第一表面上。 电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。 通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。 通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。 当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。 因此，可以使用较低分辨率的工艺，这导致制造成本低和制造工艺简单。