公开(公告)号：US09329471B1

公开(公告)日：2016-05-03

申请号：US14533497

申请日：2014-11-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Guoxiang Ning ,  Xintuo Dai ,  Huang Liu ,  Chin Teong Lim

IPC: G03F1/54 ,  G03F1/70 ,  G03F1/80 ,  G03F7/20 ,  G06F17/50

CPC classification number: G06F17/5081 ,  G03F1/54 ,  G03F1/70 ,  G03F1/80 ,  G03F7/16 ,  G03F7/20 ,  G03F7/32 ,  G03F7/34

Abstract: Achieving a critical dimension target for a feature based on characteristics of a resist is facilitated. Mask data is established for fabricating a lithographic mask to expose different regions of a resist to high, low, and intermediate exposure levels. The resist is configured to exhibit high solubility when exposed to the high or low exposure level, and low solubility when exposed to the intermediate exposure level. A critical dimension for a region of the resist to be exposed to the intermediate exposure level is determined, and the mask data is established to indicate opaque regions for forming on the lithographic mask. The opaque regions are arrayed to facilitate exposing the region of the resist to the intermediate exposure level, to achieve the determined critical dimension. Further, a method is provided for forming in-situ a patterned mask from a mask layer above a substrate material.

Abstract translation: 实现基于抗蚀剂特性的特征的关键尺寸目标。 建立掩模数据用于制造光刻掩模以将抗蚀剂的不同区域暴露于高，低和中等曝光水平。 抗蚀剂被配置为当暴露于高或低曝光水平时表现出高溶解度，并且当暴露于中等曝光水平时具有低溶解度。 确定抗蚀剂暴露于中间曝光水平的区域的关键尺寸，并且建立掩模数据以指示用于在光刻掩模上形成的不透明区域。 排列不透明区域以便于将抗蚀剂的区域暴露于中间曝光水平，以获得确定的临界尺寸。 此外，提供了一种用于从衬底材料上方的掩模层原位形成图案化掩模的方法。

公开(公告)号：US10809633B1

公开(公告)日：2020-10-20

申请号：US16561702

申请日：2019-09-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dongyue Yang ,  Cheuk Wun Wong ,  Xintuo Dai ,  Sanggil Bae

IPC: G03F7/20

Abstract: Structures for detecting and correcting an overlay inaccuracy and methods of detecting and correcting an overlay inaccuracy. An overlay target includes a first plurality of features arranged along a first longitudinal axis in a first line-space pattern having a first line width, and a second plurality of features arranged along a second longitudinal axis in a second line-space pattern having a second line width that is less than the first line width. The second longitudinal axis is aligned substantially parallel to the first longitudinal axis.

公开(公告)号：US10705435B2

公开(公告)日：2020-07-07

申请号：US15869150

申请日：2018-01-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Dongyue Yang ,  Xintuo Dai ,  Dongsuk Park ,  Minghao Tang ,  Md Motasim Bellah ,  Pavan Kumar Chinthamanipeta Sripadarao ,  Cheuk Wun Wong

IPC: G03F7/20 ,  G03F9/00

Abstract: Two pairs of alignment targets (one aligned, one misaligned by a bias distance) are formed on different masks to produce a first pair of conjugated interference patterns. Other pairs of alignment targets are also formed on the masks to produce a second pair of conjugated interference patterns that are inverted the first. Misalignment of the dark and light regions of the first interference patterns and the second interference patterns in both pairs of conjugated interference patterns is determined when patterns formed using the masks are overlaid. A magnification factor (of the interference pattern misalignment to the target misalignment) is calculated as a ratio of the difference of misalignment of the relatively dark and relatively light regions in the pairs of interference patterns, over twice the bias distance. The interference pattern misalignment is divided by the magnification factor to produce a self-referenced and self-calibrated target misalignment amount, which is then output.

公开(公告)号：US10056458B2

公开(公告)日：2018-08-21

申请号：US14993537

申请日：2016-01-12

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Chang Ho Maeng ,  Andy Wei ,  Anthony Ozzello ,  Bharat Krishnan ,  Guillaume Bouche ,  Haifeng Sheng ,  Haigou Huang ,  Huang Liu ,  Huy M. Cao ,  Ja-Hyung Han ,  SangWoo Lim ,  Kenneth A. Bates ,  Shyam Pal ,  Xintuo Dai ,  Jinping Liu

IPC: H01L21/3205 ,  H01L29/40 ,  H01L29/423 ,  H01L21/02 ,  H01L21/28 ,  H01L29/417

CPC classification number: H01L29/401 ,  H01L21/02126 ,  H01L21/02282 ,  H01L21/28229 ,  H01L21/76828 ,  H01L21/76837 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/78

Abstract: Methods of MOL S/D contact patterning of RMG devices without gouging of the Rx area or replacement of the dielectric are provided. Embodiments include forming a SOG layer around a RMG structure, the RMG structure having a contact etch stop layer and a gate cap layer; forming a lithography stack over the SOG and gate cap layers; patterning first and second TS openings through the lithography stack down to the SOG layer; removing a portion of the SOG layer through the first and second TS openings, the removing selective to the contact etch stop layer; converting the SOG layer to a SiO2 layer; forming a metal layer over the SiO2 layer; and planarizing the metal and SiO2 layers down to the gate cap layer.

公开(公告)号：US09606432B2

公开(公告)日：2017-03-28

申请号：US14533464

申请日：2014-11-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Guoxiang Ning ,  Xintuo Dai ,  Huang Liu ,  Chin Teong Lim

IPC: G03F7/00 ,  G03F7/09 ,  G03F7/20

CPC classification number: G03F7/0035 ,  G03F7/094 ,  G03F7/2024 ,  G03F7/203

Abstract: Fabrication of a circuit structure is facilitated, in which a first exposure of a multi-layer structure is performed using a first mask, which defines positioning of at least one edge of an element to be formed above a substrate of the multi-layer structure. A second exposure of the multi-layer structure is performed using a second mask, which defines positioning of at least one other edge of the element. At least some material of the multi-layer structure is removed using, at least in part, the defined positioning of the at least one edge and the at least one other edges of the element, to form the element above the substrate. In some examples, multiple elements are formed, the multiple elements being hardmask elements to facilitate an etch process to etch a substrate material.

公开(公告)号：US09329495B2

公开(公告)日：2016-05-03

申请号：US14084676

申请日：2013-11-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xintuo Dai ,  Binbin Yan

IPC: G01B11/00 ,  G03F7/20

CPC classification number: G03F7/70633

Abstract: Overlay metrology systems are provided which include, for instance: a first metrology pattern including at least two first pairs of sub-patterns, at least one sub-pattern lacking 90 degree rotational symmetry, and a first center position for the first metrology pattern being determinable in an X-Y coordinate layout from the at least two first pairs of sub-patterns; and a second metrology including at least two second pairs of sub-patterns, at least one sub-pattern lacking 90 degree rotational symmetry, and a second center position for the second metrology pattern being determinable in the X-Y coordinate layout from the at least two second pairs of sub-patterns. Methods of making overlay metrology systems are also provided, which include, for instance, providing a first metrology pattern and a second metrology pattern, and arranging the metrology patterns in relation to each other within the X-Y coordinate layout.

Abstract translation: 提供覆盖度量系统，其包括例如：包括至少两个第一对子图案的第一计量图案，缺少90度旋转对称的至少一个子图案，以及用于第一计量模式的第一中心位置是可确定的 在来自所述至少两个第一对子图案的XY坐标布局中; 以及第二计量学，其包括至少两个第二对子图案，至少一个缺少90度旋转对称的子图案，以及用于所述第二计量图案的第二中心位置可以在所述XY坐标布局中从所述至少两个第二 一对子模式。 还提供了制作覆盖计量系统的方法，其包括例如提供第一计量模式和第二计量模式，以及在X-Y坐标布局内彼此相关地布置计量模式。

公开(公告)号：US20200241429A1

公开(公告)日：2020-07-30

申请号：US16847721

申请日：2020-04-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Dongyue Yang ,  Xintuo Dai ,  Dongsuk Park ,  Minghao Tang ,  Md Motasim Bellah ,  Pavan Kumar Chinthamanipeta Sripadarao ,  Cheuk Wun Wong

IPC: G03F7/20 ,  G03F9/00

Abstract: Two pairs of alignment targets (one aligned, one misaligned by a bias distance) are formed on different masks to produce a first pair of conjugated interference patterns. Other pairs of alignment targets are also formed on the masks to produce a second pair of conjugated interference patterns that are inverted the first. Misalignment of the dark and light regions of the first interference patterns and the second interference patterns in both pairs of conjugated interference patterns is determined when patterns formed using the masks are overlaid. A magnification factor (of the interference pattern misalignment to the target misalignment) is calculated as a ratio of the difference of misalignment of the relatively dark and relatively light regions in the pairs of interference patterns, over twice the bias distance. The interference pattern misalignment is divided by the magnification factor to produce a self-referenced and self-calibrated target misalignment amount, which is then output.

公开(公告)号：US10483214B2

公开(公告)日：2019-11-19

申请号：US15860775

申请日：2018-01-03

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xintuo Dai ,  Dongsuk Park ,  Guoxiang Ning ,  Mert Karakoy

IPC: H01L23/544 ,  H01L21/66 ,  G03F7/20

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to overlay structures and methods of manufacture. The method includes locating a first plurality of offset dummy features in a first layer; locating a second plurality of offset dummy features in a second layer; measuring a distance between the first plurality of offset dummy features and the second plurality of offset dummy features; and determining that the first layer or the second layer is shifted with respect to one another based on the measurement.

公开(公告)号：US20190267329A1

公开(公告)日：2019-08-29

申请号：US15904853

申请日：2018-02-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Cung D. Tran ,  Huaxiang Li ,  Bradley Morgenfeld ,  Xintuo Dai ,  Sanggil Bae ,  Rui Chen ,  Md Motasim Bellah ,  Dongyue Yang ,  Minghao Tang ,  Christian J. Ayala ,  Ravi Prakash Srivastava ,  Kripa Nidhan Chauhan ,  Pavan Kumar Chinthamanipeta Sripadarao

IPC: H01L23/544 ,  G03F9/00 ,  G03F7/16 ,  H01L21/027

Abstract: In an exemplary method, a first layer is formed on a substrate. First overlay marks are formed in a first zone of the first layer. A non-transparent layer is formed on top of the first layer. At least a portion of the non-transparent layer is removed from an area above the first zone of the first layer. This provides optical access to the first overlay marks. A second layer is formed on top of the non-transparent layer. Second overlay marks are formed in a second zone of the second layer. Position information is obtained from each of the first overlay marks and the second overlay marks.

公开(公告)号：US20180033870A1

公开(公告)日：2018-02-01

申请号：US15219370

申请日：2016-07-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Haigou Huang ,  Xusheng Wu ,  Xintuo Dai

IPC: H01L29/66 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/06

CPC classification number: H01L29/66795 ,  H01L21/28123 ,  H01L21/32139 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/7848

Abstract: A method includes forming at least one fin above a semiconductor substrate. An isolation structure is formed adjacent the fin. A liner layer is formed above the isolation structure adjacent an interface between the fin and the isolation structure. The liner layer includes a material different than the isolation structure. A sacrificial gate structure is formed above a portion of the fin and includes a sacrificial gate insulation layer and a sacrificial gate structure. The sacrificial gate structure is removed. The sacrificial gate insulation layer is removed selectively to the liner layer. A replacement gate structure is formed above a portion of the fin in a cavity defined by removing the sacrificial gate structure.