公开(公告)号：US06794314B2

公开(公告)日：2004-09-21

申请号：US10281418

申请日：2002-10-25

Applicant: Ivo Raaijmakers ,  Yong-Bae Kim ,  Marko Tuominen ,  Suvi P. Haukka

Inventor： Ivo Raaijmakers ,  Yong-Bae Kim ,  Marko Tuominen ,  Suvi P. Haukka

IPC: H01L2131

CPC classification number: H01L21/28194 ,  H01L21/02049 ,  H01L21/02052 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/02359 ,  H01L21/28167 ,  H01L21/28211 ,  H01L21/31662 ,  H01L29/517 ,  Y10S438/906

Abstract: A method is disclosed for forming an ultrathin oxide layer of uniform thickness. The method is particularly advantageous for producing uniformly thin interfacial oxides beneath materials of high dielectric permitivity, or uniformly thin passivation oxides. Hydrofluoric (HF) etching of a silicon surface, for example, is followed by termination of the silicon surface with ligands larger than H or F, particularly hydroxyl, alkoxy or carboxylic tails. The substrate is oxidized with the surface termination in place. The surface termination and relatively low temperatures moderate the rate of oxidation, such that a controllable thickness of oxide is formed. In some embodiments, the ligand termination is replaced with OH prior to further deposition. The deposition preferably includes alternating, self-limiting chemistries in an atomic layer deposition process, though any other suitable deposition process can be used. Two or more of the HF etching, surface termination, oxidation, hydroxyl replacement of the surface termination and deposition on the oxide can be conducted in situ.

Abstract translation: 公开了形成均匀厚度的超薄氧化物层的方法。 该方法特别有利于在高介电常数材料或均匀薄的钝化氧化物材料下制备均匀的薄界面氧化物。 例如，硅表面的氢氟酸（HF）蚀刻之后，用大于H或F的配体，特别是羟基，烷氧基或羧酸尾部的配位体终止硅表面。 衬底被氧化，表面终止就位。 表面终止和相对低的温度调节氧化速率，使得形成可控的氧化物厚度。 在一些实施方案中，在进一步沉积之前，将配体终止物用OH代替。 沉积优选地包括在原子层沉积工艺中的交替的自限制化学，尽管可以使用任何其它合适的沉积工艺。 HF蚀刻，表面终止，氧化，羟基取代表面终止和沉积在氧化物上的两个或多个可以原位进行。

公开(公告)号：US06749687B1

公开(公告)日：2004-06-15

申请号：US09227679

申请日：1999-01-08

Applicant: Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

Inventor： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

IPC: C30B2516

CPC classification number: C30B29/06 ,  C23C16/4405 ,  C23C16/481 ,  C30B25/02 ,  C30B25/105 ,  C30B25/14 ,  C30B33/005 ,  C30B33/02 ,  C30B33/12 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28017 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/31662 ,  H01L29/66651

Abstract: A single-wafer, chemical vapor deposition reactor is provided with hydrogen and silicon source gas suitable for epitaxial silicon deposition, as well as a safe mixture of oxygen in a non-reactive gas. Methods are provided for forming oxide and silicon layers within the sane chamber. In particular, a sacrificial oxidation is performed, followed by a hydrogen bake to sublime the oxide and leave a clean substrate. Epitaxial deposition can follow in situ. A protective oxide can also be formed over the epitaxial layer within the same chamber, preventing contamination of the critical epitaxial layer. Alternatively, the oxide layer can serve as the gate dielectric, and a polysilicon gate layer can be formed in situ over the oxide.

Abstract translation: 单晶片化学气相沉积反应器具有适用于外延硅沉积的氢和硅源气体，以及非反应性气体中的氧的安全混合物。 提供了在正常室内形成氧化物层和硅层的方法。 特别地，进行牺牲氧化，然后进行氢气烘烤以使氧化物升华并留下清洁的基材。 外延沉积可以原位追踪。 也可以在同一室内的外延层上形成保护性氧化物，防止关键外延层的污染。 或者，氧化物层可以用作栅极电介质，并且可以在氧化物上原位形成多晶硅栅极层。

公开(公告)号：US06708700B2

公开(公告)日：2004-03-23

申请号：US10412939

申请日：2003-04-14

Applicant: Ivo Raaijmakers ,  Franciscus B. Van Bilsen

Inventor： Ivo Raaijmakers ,  Franciscus B. Van Bilsen

IPC: B08B312

CPC classification number: H01J37/32862 ,  B08B7/0035 ,  B08B9/08 ,  C23C16/4405 ,  Y10S134/902 ,  Y10S438/905

Abstract: A method of removing deposits from selected areas of a substrate-processing chamber comprising applying RF energy to a coil located around selected areas of the chamber is provided. Also provided is a substrate-processing chamber with improved cleaning properties having a coil capable of being coupled with an RF field disposed at selected areas of the chamber.

Abstract translation: 提供了从衬底处理室的选定区域去除沉积物的方法，包括将RF能量施加到位于室的选定区域周围的线圈。 还提供了具有改进的清洁特性的基板处理室，其具有能够与设置在室的选定区域处的RF场耦合的线圈。

公开(公告)号：US06521503B2

公开(公告)日：2003-02-18

申请号：US09840532

申请日：2001-04-23

Applicant: Paul Jacobson ,  Ivo Raaijmakers ,  Ravinder Aggarwal ,  Robert C. Haro

Inventor： Paul Jacobson ,  Ivo Raaijmakers ,  Ravinder Aggarwal ,  Robert C. Haro

IPC: H01L21336

CPC classification number: H01L21/28556

Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.

公开(公告)号：US06444036B2

公开(公告)日：2002-09-03

申请号：US09737681

申请日：2000-12-15

Applicant: Chyi Chern ,  Michal Danek ,  Marvin Liao ,  Roderick C. Mosely ,  Karl Littau ,  Ivo Raaijmakers ,  David C. Smith

Inventor： Chyi Chern ,  Michal Danek ,  Marvin Liao ,  Roderick C. Mosely ,  Karl Littau ,  Ivo Raaijmakers ,  David C. Smith

IPC: B05C1100

CPC classification number: H01L21/76864 ,  C23C16/34 ,  C23C16/45565 ,  C23C16/4581 ,  C23C16/4586 ,  C23C16/481 ,  C23C16/5096 ,  C23C16/56 ,  H01J37/32174 ,  H01J2237/2001 ,  H01J2237/336 ,  H01L21/28512 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber. The rf signal means is coupled to the showerhead and the wafer support for providing a first rf signal to the showerhead and a second rf signal to the wafer support.

Abstract translation: 放置在处理室中的晶片上的膜的构造可以通过以下步骤进行。 在晶片上沉积一层材料。 接下来，将材料层退火。 一旦退火完成，材料可能被氧化。 或者，一旦退火完成，材料可能暴露于硅气体。 沉积，退火和氧化或硅气体暴露都可以在相同的室中进行，而不需要从腔室中移除晶片，直到完成所有三个步骤。 用于进行这种原位结构的半导体晶片处理室可以包括处理室，喷头，晶片支架和射频信号装置。 淋浴头将气体供应到处理室中，而晶片支撑件在处理室中支撑晶片。 rf信号装置耦合到喷头和晶片支架，用于向喷头提供第一rf信号，并将第二rf信号耦合到晶片支架。

公开(公告)号：US06383330B1

公开(公告)日：2002-05-07

申请号：US09394372

申请日：1999-09-10

Applicant: Ivo Raaijmakers

Inventor： Ivo Raaijmakers

IPC: H01L2100

CPC classification number: H01L21/67069 ,  C23C16/44 ,  C23C16/4585 ,  C23C16/481 ,  H01L21/6719

Abstract: Described herein is a process chamber with a substantially all-quartz interior surface. The preferred embodiments have upper and lower walls being curved in both the x-z and y-z planes. In one embodiment, the chamber has thin upper and lower dome walls made from a generally transparent material such as quartz, each with a convex exterior surface and a concave interior surface. These walls are joined at their side edges to a cylindrical side wall, preferably formed from a generally translucent material such as bubble quartz. The upper and lower walls and the side wall substantially enclose an all-quartz interior surface, except for apertures used for gas inlet and outlet, wafer intrusion and extraction and wafer retention. An internal reinforcement extends along the entire interior perimeter of the chamber to provide additional strength and support to the chamber. An external reinforcement surrounds the cylindrical side wall to confine outward expansion of the chamber. In another embodiment, the chamber has upper and lower dome walls that are curved along both their longitudinal and lateral axes, the walls being substantially rectangular when viewed from above.

Abstract translation: 这里描述的是具有基本上全石英内表面的处理室。 优选实施例具有上壁和下壁在x-z和y-z平面中都是弯曲的。 在一个实施例中，腔室具有由诸如石英的大体透明材料制成的薄的上，下圆顶壁，每个都具有凸的外表面和凹的内表面。 这些壁在其侧边缘处连接到圆柱形侧壁，优选地由诸如气泡石英的大致半透明的材料形成。 除了用于气体入口和出口，晶片入侵和提取和晶片保留的孔之外，上壁和下壁以及侧壁基本上包围全石英内表面。 内部加强件沿着腔室的整个内部周边延伸，以向腔室提供额外的强度和支撑。 外部加强件围绕圆柱形侧壁以限制腔室的向外膨胀。 在另一个实施例中，腔室具有沿着它们的纵向和横向轴线弯曲的上拱顶壁和下圆顶壁，当从上方观察时，壁基本上是矩形的。

公开(公告)号：US06318957B1

公开(公告)日：2001-11-20

申请号：US09256743

申请日：1999-02-24

Applicant: Paul R. Carr ,  Paul T. Jacobson ,  James F. Kusbel ,  James S. Roundy ,  Ravinder K. Aggarwal ,  Ivo Raaijmakers ,  Rod Lenz ,  Nilesh Rajbharti

Inventor： Paul R. Carr ,  Paul T. Jacobson ,  James F. Kusbel ,  James S. Roundy ,  Ravinder K. Aggarwal ,  Ivo Raaijmakers ,  Rod Lenz ,  Nilesh Rajbharti

IPC: B65G4907

CPC classification number: H01L21/68735 ,  H01L21/67346 ,  H01L21/67778 ,  H01L21/68721 ,  H01L21/68728 ,  H01L21/68764 ,  H01L21/68771 ,  Y10S414/137 ,  Y10S414/141

Abstract: The invention is a carrier comprising three support elements connected by an underlying frame. The periphery of a wafer rests upon the support elements. The invention also comprises a wafer handler with a plurality of arms. Spacers space the carrier above a base plate associated with a station in a wafer handling area. An arm slides beneath the frame and between the spacers, but the handler does not contact the wafer. A method of using the handler and carrier is provided where the handler lifts and rotates the carrier with the wafer through various stations in a wafer handling area. A control device reduces the handler speed only at critical points of the processing cycle. The handler is capable of moving a plurality of carriers and wafers simultaneously.

Abstract translation: 本发明是一种载体，其包括由下面的框架连接的三个支撑元件。 晶片的周边位于支撑元件上。 本发明还包括具有多个臂的晶片处理器。 隔板将载体放置在与晶片处理区域中的站相关联的基板上方。 手臂在框架下方和间隔件之间滑动，但是处理器不接触晶片。 提供了一种使用处理器和载体的方法，其中处理器通过晶片处理区域中的各个工位来提升和旋转载体与晶片。 控制装置仅在处理周期的关键点降低处理器速度。 处理器能够同时移动多个载体和晶片。

公开(公告)号：US06293749B1

公开(公告)日：2001-09-25

申请号：US09193991

申请日：1998-11-17

Applicant: Ivo Raaijmakers ,  Loren R. Jacobs ,  Michael W. Halpin ,  James A. Alexander ,  Ken O'Neill ,  Dennis L. Goodwin

Inventor： Ivo Raaijmakers ,  Loren R. Jacobs ,  Michael W. Halpin ,  James A. Alexander ,  Ken O'Neill ,  Dennis L. Goodwin

IPC: B65G4907

CPC classification number: H01L21/68785 ,  H01L21/68707 ,  Y10S294/902 ,  Y10S414/141

Abstract: A system for facilitating wafer transfer comprises a susceptor unit consisting of an inner susceptor section which rests within an outer susceptor section. A vertically movable and rotatable support spider located beneath the susceptor unit can rotate into positions to engage either the inner or the outer susceptor sections. When the inner section is engaged, the support spider lifts the inner section vertically out of the outer section. When the outer section is engaged, the support spider raises and lowers the entire susceptor unit. A robotic arm end effector engaging only the lower surface of the outer edge of the wafer permits hot wafer pick-up and unloading by the inner susceptor section. Several end effectors are disclosed that minimize non-uniform thermal effect on the substrate.

Abstract translation: 一种用于促进晶片转印的系统包括一个基座单元，该基座单元由一个搁置在一个外部感受器部分内的内部感受器部分组成。 位于基座单元下方的可垂直移动和可旋转的支撑星形轮可以旋转到与内部或外部基座部分接合的位置。 当内部部分接合时，支撑蜘蛛将内部部分垂直地提升出外部部分。 当外部部分接合时，支撑架蜘蛛提升并降低整个基座单元。 仅接合晶片的外边缘的下表面的机械手臂端部执行器允许内部感受器部分的热晶片拾取和卸载。 公开了使基板上的不均匀热效应最小化的几个端部执行器。

公开(公告)号：US06209220B1

公开(公告)日：2001-04-03

申请号：US09438200

申请日：1999-11-11

Applicant: Ivo Raaijmakers

Inventor： Ivo Raaijmakers

IPC: F26B1900

CPC classification number: H01L21/67109 ,  C23C16/54 ,  C23C16/56 ,  C30B25/10

Abstract: Methods and apparatuses are provided for cooling semiconductor substrates prior to handling. In one embodiment, a substrate and support structure combination is lifted after high temperature processing to a cold wall of a thermal processing chamber, which acts as a heat sink. Conductive heat transfer across a small gap from the substrate to the heat sink speeds wafer cooling prior to handling the wafer (e.g., with a robot). In another embodiment, a separate plate is kept cool within a pocket during processing, and is moved close to the substrate and support after processing. In yet another embodiment, a cooling station between a processing chamber and a storage cassette includes two movable cold plates, which are movable to positions closely spaced on either side of the wafer.

Abstract translation: 提供了用于在处理之前冷却半导体衬底的方法和装置。 在一个实施例中，将衬底和支撑结构组合在高温处理之后提升到用作散热器的热处理室的冷壁。 在从基板到散热片的小间隙处的导电热传递在处理晶片（例如，使用机器人）之前加速晶片冷却。 在另一个实施例中，单独的板在处理期间保持在袋内冷却，并且在处理之后移动靠近基板并支撑。 在另一个实施例中，处理室和存储盒之间的冷却站包括两个可移动的冷板，其可移动到在晶片的任一侧上紧密间隔开的位置。

公开(公告)号：US6158951A

公开(公告)日：2000-12-12

申请号：US113441

申请日：1998-07-10

Applicant: Paul R. Carr ,  Paul T. Jacobson ,  James F. Kusbel ,  James S. Roundy ,  Ravinder K. Aggarwal ,  Ivo Raaijmakers

Inventor： Paul R. Carr ,  Paul T. Jacobson ,  James F. Kusbel ,  James S. Roundy ,  Ravinder K. Aggarwal ,  Ivo Raaijmakers

IPC: H01L21/673 ,  H01L21/677 ,  H01L21/687 ,  B65G1/06

CPC classification number: H01L21/68721 ,  H01L21/67346 ,  H01L21/67778 ,  H01L21/68728 ,  H01L21/68764 ,  H01L21/68771 ,  Y10S414/137 ,  Y10S414/141

Abstract: The invention is a carrier comprising three support elements connected by an underlying frame. The periphery of a wafer rests upon the support elements. The invention also comprises a wafer handler with a plurality of arms. Spacers space the carrier above a base plate associated with a station in a wafer handling area. An arm slides beneath the frame and between the spacers, but the handler does not contact the wafer. A method of using the handler and carrier is provided where the handler lifts and rotates the carrier with the wafer through various stations in a wafer handling area. The handler is capable of moving a plurality of carriers and wafers simultaneously.

Abstract translation: 本发明是一种载体，其包括由下面的框架连接的三个支撑元件。 晶片的周边位于支撑元件上。 本发明还包括具有多个臂的晶片处理器。 隔板将载体放置在与晶片处理区域中的站相关联的基板上方。 手臂在框架下方和间隔件之间滑动，但是处理器不接触晶片。 提供了一种使用处理器和载体的方法，其中处理器通过晶片处理区域中的各个工位来提升和旋转载体与晶片。 处理器能够同时移动多个载体和晶片。