公开(公告)号：US07952137B2

公开(公告)日：2011-05-31

申请号：US12477121

申请日：2009-06-02

Applicant: Wei-Chieh Lin ,  Li-Cheng Lin

Inventor： Wei-Chieh Lin ,  Li-Cheng Lin

IPC: H01L23/60

CPC classification number: H01L29/7813 ,  H01L27/0255 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/66734 ,  H01L29/7808 ,  H01L29/866

Abstract: A trench semiconductor device and a method of making the same are provided. The trench semiconductor device includes a trench MOS device and a trench ESD protection device. The trench ESD protection device is electrically connected between the gate electrode and source electrode of the trench MOS device so as to provide ESD protection. The fabrication of the ESD protection device is integrated into the process of the trench MOS device, and therefore no extra mask is required to define the doped regions of the trench ESD protection device. Consequently, the trench semiconductor device is advantageous for its simplified manufacturing process and low cost.

Abstract translation: 提供了沟槽半导体器件及其制造方法。 沟槽半导体器件包括沟槽MOS器件和沟槽ESD保护器件。 沟槽ESD保护器件电连接在沟槽MOS器件的栅电极和源电极之间，以提供ESD保护。 ESD保护器件的制造集成到沟槽MOS器件的工艺中，因此不需要额外的掩模来限定沟槽ESD保护器件的掺杂区域。 因此，沟槽半导体器件有利于其简化的制造工艺和低成本。

公开(公告)号：US07851310B2

公开(公告)日：2010-12-14

申请号：US12483237

申请日：2009-06-11

Applicant: Li-Cheng Lin ,  Wei-Chieh Lin

Inventor： Li-Cheng Lin ,  Wei-Chieh Lin

IPC: H01L21/338

CPC classification number: H01L29/4236 ,  H01L29/66621 ,  H01L29/78

Abstract: A method for forming semiconductor device, which simultaneously forms a trench MOS transistor device, and an embedded schottky barrier diode (SBD) device in a semiconductor substrate. The embedded SBD device has lower forward voltage drop, which reduces power dissipation. In addition, the voltage bearing ability may be modified easily by virtue of altering the dopant concentration or the width of the voltage bearing dopant region, or the thickness of epitaxial silicon layer. Furthermore, extra cost of purchasing SBD diode may be saved.

Abstract translation: 一种在半导体衬底中同时形成沟槽MOS晶体管器件和嵌入肖特基势垒二极管（SBD）器件的半导体器件的形成方法。 嵌入式SBD器件具有较低的正向压降，从而降低功耗。 此外，由于改变掺杂剂掺杂剂区域的掺杂剂浓度或宽度，或外延硅层的厚度，可以容易地改变电压承载能力。 此外，可以节省购买SBD二极管的额外成本。

公开(公告)号：US20100216290A1

公开(公告)日：2010-08-26

申请号：US12483237

申请日：2009-06-11

Applicant: Li-Cheng Lin ,  Wei-Chieh Lin

Inventor： Li-Cheng Lin ,  Wei-Chieh Lin

IPC: H01L21/336

CPC classification number: H01L29/4236 ,  H01L29/66621 ,  H01L29/78

Abstract: A method for forming semiconductor device, which simultaneously forms a trench MOS transistor device, and an embedded schottky barrier diode (SBD) device in a semiconductor substrate. The embedded SBD device has lower forward voltage drop, which reduces power dissipation. In addition, the voltage bearing ability may be modified easily by virtue of altering the dopant concentration or the width of the voltage bearing dopant region, or the thickness of epitaxial silicon layer. Furthermore, extra cost of purchasing SBD diode may be saved.

公开(公告)号：US20090113086A1

公开(公告)日：2009-04-30

申请号：US12289418

申请日：2008-10-28

Applicant: Chunli Wu ,  Tsung-Liang Lu ,  Chung-Shan Wang ,  Yen-Chen Chen ,  Li-Cheng Lin

Inventor： Chunli Wu ,  Tsung-Liang Lu ,  Chung-Shan Wang ,  Yen-Chen Chen ,  Li-Cheng Lin

IPC: G06F13/00

CPC classification number: H04W72/1284 ,  H04W72/1242

Abstract: A method for providing a buffer status report in a mobile communication network is implemented between a base station and a user equipment. When data arrives to buffers of the user equipment and the priority of a logical channel for the data is higher than those of other logical channels for existing data in the buffers, a short buffer status report associated with the buffer of a logical channel group corresponding to the arrival data is triggered. The user equipment is based on obtained resources allocated by the base station to fill all data of the buffer of the logical channel group in a Protocol Data Unit. If all data of the buffer of the logical channel group corresponding to the arrival data can be completely filled in the Protocol Data Unit, the short buffer status report is canceled. Otherwise, the user equipment transmits the short buffer status report.

Abstract translation: 在基站和用户设备之间实现用于在移动通信网络中提供缓冲器状态报告的方法。 当数据到达用户设备的缓冲器并且用于数据的逻辑信道的优先级高于用于缓冲器中的现有数据的其他逻辑信道的优先级时，与缓冲器中的对应于逻辑信道组的缓冲器相关联的短缓冲状态报告 到达数据被触发。 用户设备基于由基站分配的获得的资源来填充协议数据单元中的逻辑信道组的缓冲器的所有数据。 如果对应于到达数据的逻辑信道组的缓冲器的所有数据都可以完全填充到协议数据单元中，则缓冲器状态报告被取消。 否则，用户设备发送短暂缓冲状态报告。

公开(公告)号：US08049273B2

公开(公告)日：2011-11-01

申请号：US12371618

申请日：2009-02-15

Applicant: Wei-Chieh Lin ,  Ho-Tai Chen ,  Li-Cheng Lin ,  Jen-Hao Yeh ,  Hsin-Yen Chiu ,  Hsin-Yu Hsu ,  Shih-Chieh Hung

Inventor： Wei-Chieh Lin ,  Ho-Tai Chen ,  Li-Cheng Lin ,  Jen-Hao Yeh ,  Hsin-Yen Chiu ,  Hsin-Yu Hsu ,  Shih-Chieh Hung

IPC: H01L26/66

CPC classification number: H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4916

Abstract: A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant, a second trench structure including a gate oxide layer formed around a second trench with poly-Si implant, a p-base region formed between the first trench structure and the second trench structure, a plurality of n+ source region formed on the p-base region and between the first trench structure and the second trench structure, a dielectric layer formed on the first trench structure, the second trench structure, and the plurality of n+ source region. The frontside metal layer is formed on the semiconductor layer and filling gaps formed between the plurality of n+ source region on the p-base region.

Abstract translation: 功率半导体器件包括背面金属层，形成在背面金属层上的衬底，形成在衬底上的半导体层和前侧金属层。 半导体层包括第一沟槽结构，其包括围绕具有多晶硅注入的第一沟槽形成的栅极氧化层，第二沟槽结构，包括围绕具有多晶硅注入的第二沟槽形成的栅极氧化层，形成的p基区 在所述第一沟槽结构和所述第二沟槽结构之间形成有多个n +源极区，形成在所述p基区上以及所述第一沟槽结构和所述第二沟槽结构之间，形成在所述第一沟槽结构上的介电层，所述第二沟槽结构 ，以及多个n +源极区域。 前半导体金属层形成在半导体层上并填充形成在p基区上的多个n +源极区之间的间隙。

公开(公告)号：US20100283146A1

公开(公告)日：2010-11-11

申请号：US12436266

申请日：2009-05-06

Applicant: Ming-Chung Chian ,  Tsan-Yao Cheng ,  Li-Cheng Lin ,  Hong-Hsiang Tsai

Inventor： Ming-Chung Chian ,  Tsan-Yao Cheng ,  Li-Cheng Lin ,  Hong-Hsiang Tsai

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/525 ,  H01L23/53223 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/13024 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15788 ,  H01L2924/3651 ,  H01L2924/01014 ,  H01L2924/04941 ,  H01L2924/01022 ,  H01L2924/00014 ,  H01L2924/0496 ,  H01L2924/0498 ,  H01L2924/0499 ,  H01L2924/0494 ,  H01L2924/04953 ,  H01L2924/00

Abstract: A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing the circuit structure. The composite pad structure includes a first conductive layer, a barrier layer, and a second conductive layer which are sequentially disposed. The composite pad structure is disposed on the insulating layer and fills the first opening to electrically connect to the circuit structure. The passivation layer covers the composite pad structure and has a second opening exposing the composite pad structure. The bump fills the second opening and electrically connects to the composite pad structure.

Abstract translation: 提供了包括衬底，绝缘层，复合衬垫结构，钝化层和凸块的半导体结构。 电路结构设置在基板上。 绝缘层覆盖基板并且具有暴露电路结构的第一开口。 复合焊盘结构包括依次布置的第一导电层，阻挡层和第二导电层。 复合焊盘结构设置在绝缘层上并填充第一开口以电连接到电路结构。 钝化层覆盖复合焊盘结构，并具有露出复合焊盘结构的第二开口。 凸块填充第二开口并电连接到复合垫结构。

公开(公告)号：US07769926B2

公开(公告)日：2010-08-03

申请号：US12289418

申请日：2008-10-28

Applicant: Chunli Wu ,  Tsung-Liang Lu ,  Chung-Shan Wang ,  Yen-Chen Chen ,  Li-Cheng Lin

Inventor： Chunli Wu ,  Tsung-Liang Lu ,  Chung-Shan Wang ,  Yen-Chen Chen ,  Li-Cheng Lin

IPC: G06F13/00 ,  H04B7/216 ,  H04J3/12

CPC classification number: H04W72/1284 ,  H04W72/1242

Abstract: A method for providing a buffer status report in a mobile communication network is implemented between a base station and a user equipment. When data arrives to buffers of the user equipment and the priority of a logical channel for the data is higher than those of other logical channels for existing data in the buffers, a short buffer status report associated with the buffer of a logical channel group corresponding to the arrival data is triggered. The user equipment is based on obtained resources allocated by the base station to fill all data of the buffer of the logical channel group in a Protocol Data Unit. If all data of the buffer of the logical channel group corresponding to the arrival data can be completely filled in the Protocol Data Unit, the short buffer status report is canceled. Otherwise, the user equipment transmits the short buffer status report.

Abstract translation: 在基站和用户设备之间实现用于在移动通信网络中提供缓冲器状态报告的方法。 当数据到达用户设备的缓冲器并且用于数据的逻辑信道的优先级高于用于缓冲器中的现有数据的其他逻辑信道的优先级时，与缓冲器中的对应于逻辑信道组的缓冲器相关联的短暂缓冲状态报告 到达数据被触发。 用户设备基于由基站分配的获得的资源来填充协议数据单元中的逻辑信道组的缓冲器的所有数据。 如果对应于到达数据的逻辑信道组的缓冲器的所有数据都可以完全填充到协议数据单元中，则缓冲器状态报告被取消。 否则，用户设备发送短暂缓冲状态报告。

公开(公告)号：US20100117142A1

公开(公告)日：2010-05-13

申请号：US12371618

申请日：2009-02-15

Applicant: Wei-Chieh Lin ,  Ho-Tai Chen ,  Li-Cheng Lin ,  Jen-Hao Yeh ,  Hsin-Yen Chiu ,  Hsin-Yu Hsu ,  Shih-Chieh Hung

Inventor： Wei-Chieh Lin ,  Ho-Tai Chen ,  Li-Cheng Lin ,  Jen-Hao Yeh ,  Hsin-Yen Chiu ,  Hsin-Yu Hsu ,  Shih-Chieh Hung

IPC: H01L29/772

CPC classification number: H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4916

Abstract: A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant, a second trench structure including a gate oxide layer formed around a second trench with poly-Si implant, a p-base region formed between the first trench structure and the second trench structure, a plurality of n+ source region formed on the p-base region and between the first trench structure and the second trench structure, a dielectric layer formed on the first trench structure, the second trench structure, and the plurality of n+ source region. The frontside metal layer is formed on the semiconductor layer and filling gaps formed between the plurality of n+ source region on the p-base region.

Abstract translation: 功率半导体器件包括背面金属层，形成在背面金属层上的衬底，形成在衬底上的半导体层和前侧金属层。 半导体层包括第一沟槽结构，其包括围绕具有多晶硅注入的第一沟槽形成的栅极氧化层，第二沟槽结构，包括围绕具有多晶硅注入的第二沟槽形成的栅极氧化层，形成的p基区 在所述第一沟槽结构和所述第二沟槽结构之间形成有多个n +源极区，形成在所述p基区上以及所述第一沟槽结构和所述第二沟槽结构之间，形成在所述第一沟槽结构上的介电层，所述第二沟槽结构 ，以及多个n +源极区域。 前半导体金属层形成在半导体层上并填充形成在p基区上的多个n +源极区之间的间隙。

公开(公告)号：US07682903B1

公开(公告)日：2010-03-23

申请号：US12334492

申请日：2008-12-14

Applicant: Wei-Chieh Lin ,  Hsin-Yu Hsu ,  Hsin-Yen Chiu ,  Shih-Chieh Hung ,  Ho-Tai Chen ,  Jen-Hao Yeh ,  Li-Cheng Lin

Inventor： Wei-Chieh Lin ,  Hsin-Yu Hsu ,  Hsin-Yen Chiu ,  Shih-Chieh Hung ,  Ho-Tai Chen ,  Jen-Hao Yeh ,  Li-Cheng Lin

IPC: H01L21/336

CPC classification number: H01L29/7813 ,  H01L21/26586 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66734

Abstract: A method of forming a power device includes providing a substrate, a semiconductor layer having at least a trench and being disposed on the substrate, a gate insulating layer covering the semiconductor layer, and a conductive material disposed in the trench, performing an ion implantation process to from a body layer, performing a tilted ion implantation process to from a heavy doped region, forming a first dielectric layer overall, performing a chemical mechanical polishing process until the body layer disposed under the heavy doped region is exposed to form source regions on the opposite sides of the trench, and forming a source trace directly covering the source regions disposed on the opposite sides of the trench.

Abstract translation: 一种形成功率器件的方法包括提供衬底，至少具有沟槽并设置在衬底上的半导体层，覆盖半导体层的栅极绝缘层和设置在沟槽中的导电材料，执行离子注入工艺 从体层进行倾斜的离子注入工艺，从重掺杂区域进行倾斜的离子注入工艺，整体形成第一介电层，进行化学机械抛光工艺，直到布置在重掺杂区域之下的体层露出，形成源区 并且形成直接覆盖设置在沟槽的相对侧上的源极区域的源极迹线。

公开(公告)号：US20060200573A1

公开(公告)日：2006-09-07

申请号：US11164406

申请日：2005-11-22

Applicant: Li-Cheng Lin

Inventor： Li-Cheng Lin

IPC: G06F15/16

CPC classification number: G06F1/3203 ,  G06F1/3293 ,  G06F3/1407 ,  G09G2330/021 ,  H04L67/36 ,  H04N5/46 ,  H04N5/765 ,  H04N7/163 ,  H04N9/641 ,  H04N9/8042 ,  H04N21/426 ,  H04N21/4436 ,  Y02D10/122

Abstract: A multimedia computer system and method is disclosed. A medium device of the computer system, like an optical disc loader, has a built-in function of multimedia decoding for supporting the computer system to work under a normal mode and a playback mode. In the normal mode, the medium device does not decode, and north/south bridges of the computer arrange data exchange and access between the medium device, a CPU, and a memory of the computer system. In the playback mode, the medium device performs multimedia decoding itself for obtaining video data from the medium, and the video data are sent to a display of the computer system by the north bridge. Therefore, in this playback mode, other circuits like the south bridge, CPU and memory can be powered down to an idle status, and a low power consumption multimedia broadcast is realized.

Abstract translation: 公开了一种多媒体计算机系统和方法。 计算机系统的介质设备，如光盘加载器，具有内置的多媒体解码功能，用于支持计算机系统在正常模式和播放模式下工作。 在正常模式下，介质设备不进行解码，计算机的北/南桥在介质设备，CPU和计算机系统的存储器之间进行数据交换和访问。 在播放模式中，媒体设备本身执行多媒体解码以从媒体获取视频数据，并且视频数据被北桥发送到计算机系统的显示器。 因此，在这种重放模式中，像南桥，CPU和存储器这样的其他电路可以掉电到空闲状态，实现低功耗多媒体广播。