公开(公告)号：US08994175B2

公开(公告)日：2015-03-31

申请号：US14139948

申请日：2013-12-24

Applicant: Renesas Electronics Corporation

Inventor： Masaki Watanabe ,  Shinji Baba ,  Muneharu Tokunaga ,  Toshihiro Iwasaki

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10175 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16055 ,  H01L2224/1607 ,  H01L2224/16113 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/17134 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83192 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/0665 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/384 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: To improve coupling reliability in flip chip bonding of a semiconductor device. By using, in the fabrication of a semiconductor device, a wiring substrate in which a wiring that crosses an opening area of a solder resist film on the upper surface of the wiring substrate has, on one side of the wiring, a bump electrode and, on the other side, a plurality of wide-width portions having no bump electrode thereon, a solder on the wiring can be dispersed to each of the wide-width portions during reflow treatment in a solder precoating step. Such a configuration makes it possible to reduce a difference in height between the solder on each of terminals and the solder on each of the wide-width portions and to enhance the coupling reliability in flip chip bonding.

Abstract translation: 以提高半导体器件的倒装芯片接合中的耦合可靠性。 通过在制造半导体器件中使用布线基板，其中布线基板的上表面上穿过阻焊膜的开口区域的布线在布线的一侧上具有凸块电极， 另一方面，在其上没有凸起电极的多个宽幅部分上，在焊料预涂工序的回流处理期间，布线上的焊料可以分散到每个宽幅部分。 通过这样的结构，能够减少各宽端部的端子上的焊料和焊料之间的高度差，并且提高倒装芯片接合时的耦合可靠性。

公开(公告)号：US20140284789A1

公开(公告)日：2014-09-25

申请号：US14139948

申请日：2013-12-24

Applicant: Renesas Electronics Corporation

Inventor： Masaki Watanabe ,  Shinji Baba ,  Muneharu Tokunaga ,  Toshihiro Iwasaki

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10175 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16055 ,  H01L2224/1607 ,  H01L2224/16113 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/17134 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83192 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/0665 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/384 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: To improve coupling reliability in flip chip bonding of a semiconductor device. By using, in the fabrication of a semiconductor device, a wiring substrate in which a wiring that crosses an opening area of a solder resist film on the upper surface of the wiring substrate has, on one side of the wiring, a bump electrode and, on the other side, a plurality of wide-width portions having no bump electrode thereon, a solder on the wiring can be dispersed to each of the wide-width portions during reflow treatment in a solder precoating step. Such a configuration makes it possible to reduce a difference in height between the solder on each of terminals and the solder on each of the wide-width portions and to enhance the coupling reliability in flip chip bonding.

Abstract translation: 以提高半导体器件的倒装芯片接合中的耦合可靠性。 通过在制造半导体器件中使用布线基板，其中布线基板的上表面上穿过阻焊膜的开口区域的布线在布线的一侧上具有凸块电极， 另一方面，在其上没有凸起电极的多个宽幅部分上，在焊料预涂工序的回流处理期间，布线上的焊料可以分散到每个宽幅部分。 通过这样的结构，能够减少各宽端部的端子上的焊料和焊料之间的高度差，并且提高倒装芯片接合时的耦合可靠性。

公开(公告)号：US08575757B2

公开(公告)日：2013-11-05

申请号：US13648876

申请日：2012-10-10

Applicant: Renesas Electronics Corporation

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2021/6015 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81909 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/0366 ,  H05K3/4602 ,  H05K2201/029 ,  H01L2924/0132 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

公开(公告)号：US10714415B2

公开(公告)日：2020-07-14

申请号：US16359485

申请日：2019-03-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/683 ,  H01L23/36 ,  H05K3/46 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/373 ,  H05K1/03 ,  H01L21/60

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

公开(公告)号：US10304768B2

公开(公告)日：2019-05-28

申请号：US15989771

申请日：2018-05-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuyuki Nakagawa ,  Shinji Baba ,  Takeumi Kato

IPC: H01L23/498 ,  H01L25/00 ,  H05K3/46 ,  H01L21/56 ,  H01L21/66 ,  H01L23/31 ,  H01L23/367 ,  H01L23/66 ,  H01L23/00 ,  H01L23/50 ,  H05K1/02

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

公开(公告)号：US09831166B2

公开(公告)日：2017-11-28

申请号：US15398444

申请日：2017-01-04

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L23/373

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2021/6015 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81909 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/0366 ,  H05K3/4602 ,  H05K2201/029 ,  H01L2924/0132 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

公开(公告)号：US20160111388A1

公开(公告)日：2016-04-21

申请号：US14983753

申请日：2015-12-30

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinji Baba ,  Masaki Watanabe ,  Muneharu Tokunaga ,  Kazuyuki Nakagawa

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L23/498

CPC classification number: H01L24/17 ,  H01L21/563 ,  H01L23/291 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/3171 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/1134 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13075 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/14136 ,  H01L2224/14155 ,  H01L2224/14177 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A technique capable of improving reliability of a semiconductor device is provided. In the present invention, as a wiring board on which a semiconductor chip is mounted, a build-up wiring board is not used but a through wiring board THWB is used. In this manner, in the present invention, the through wiring board formed of only a core layer is used, so that it is not required to consider a difference in thermal expansion coefficient between a build-up layer and the core layer, and besides, it is not required either to consider the electrical disconnection of a fine via formed in the build-up layer because the build-up layer does not exist. As a result, according to the present invention, the reliability of the semiconductor device can be improved while a cost is reduced.

Abstract translation: 提供了能够提高半导体器件的可靠性的技术。 在本发明中，作为安装有半导体芯片的布线基板，不使用积层布线板，而是使用贯通布线板THWB。 以这种方式，在本发明中，仅使用芯层形成的贯通布线板，因此不需要考虑堆积层与芯层之间的热膨胀系数的差异， 不需要考虑由于积聚层不存在而在积层中形成的精细通孔的电断开。 结果，根据本发明，可以提高半导体器件的可靠性，同时降低成本。

公开(公告)号：US08461688B2

公开(公告)日：2013-06-11

申请号：US13648876

申请日：2012-10-10

Applicant: Renesas Electronics Corporation

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

公开(公告)号：US10134663B2

公开(公告)日：2018-11-20

申请号：US15714801

申请日：2017-09-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinji Baba ,  Toshihiro Iwasaki ,  Masaki Watanabe

IPC: H01L23/498 ,  H01L25/10 ,  H01L23/50

Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.

公开(公告)号：US09576890B2

公开(公告)日：2017-02-21

申请号：US15241777

申请日：2016-08-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L23/373

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2021/6015 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81909 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/0366 ,  H05K3/4602 ,  H05K2201/029 ,  H01L2924/0132 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained.As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

Abstract translation: 对于具有布线基板的半导体器件，通过其与布线基板进行倒装芯片接合的半导体芯片和粘附到半导体芯片的背面的散热器，并且省略了用于加强布线的加强件 基板并且保持散热器的表面平滑度，布线基板具有分别形成直径不同的通孔的多个绝缘基板，并且每个绝缘基板包含玻璃布。