公开(公告)号：US10056399B2

公开(公告)日：2018-08-21

申请号：US15445579

申请日：2017-02-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Xiying Costa ,  Daxin Mao ,  Christopher Petti ,  Dana Lee ,  Yao-Sheng Lee

IPC: H01L27/115 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11519 ,  H01L27/11565

CPC classification number: H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

Abstract: A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers, a first memory opening fill structure extending through the first alternating stack and including a first memory film and a first vertical semiconductor channel, a joint-level electrically conductive layer overlying the first alternating stack, at least one joint-level doped semiconductor portion contacting a top surface of the first vertical semiconductor channel and located within, and electrically isolated from, the joint-level electrically conductive layer, a second alternating stack of second insulating layers and second electrically conductive layers located over the joint-level electrically conductive layer, and a second memory opening fill structure extending through the second alternating stack and including a second memory film and a second vertical semiconductor channel that is laterally surrounded by the second memory film and vertically extends into the at least one joint-level doped semiconductor portion.

公开(公告)号：US09633738B1

公开(公告)日：2017-04-25

申请号：US15195583

申请日：2016-06-28

Applicant: SanDisk Technologies LLC

Inventor： Zelei Guo ,  Pao-Ling Koh ,  Henry Chin ,  Pitamber Shukla ,  Deepak Raghu ,  Dana Lee

IPC: G11C16/04 ,  G11C16/16 ,  G11C16/10 ,  G11C16/30

CPC classification number: G11C16/16 ,  G11C16/10 ,  G11C16/14 ,  G11C16/22 ,  G11C16/30

Abstract: A storage system includes a controller that is configured to make host data inaccessible. To do so, the controller may control power control circuitry to supply pulses to storage locations storing host data. The pulses may include flash write pulses but no erase pulses, or a combination of flash write pulses and erase pulses. If erase pulses are supplied, the number of the erase pulses may be less than the number supplied for performance of a default erase operation.

公开(公告)号：US09552171B2

公开(公告)日：2017-01-24

申请号：US14526870

申请日：2014-10-29

Applicant: SanDisk Technologies LLC

Inventor： Yichao Huang ,  Chris Avila ,  Dana Lee ,  Henry Chin ,  Deepanshu Dutta ,  Sarath Puthenthermadam ,  Deepak Raghu

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G11C16/04 ,  G11C16/34

CPC classification number: G06F3/0647 ,  G06F3/0608 ,  G06F3/0679 ,  G06F12/0223 ,  G06F2212/7205 ,  G11C16/0483 ,  G11C16/3431 ,  G11C16/349 ,  G11C16/3495 ,  G11C2211/5644 ,  G11C2211/5648

Abstract: A number of complimentary techniques for the read scrub process using adaptive counter management are presented. In one set of techniques, in addition to maintaining a cumulative read counter for a block, a boundary word line counter can also be maintained to track the number of reads to most recently written word line or word lines of a partially written block. Another set of techniques used read count threshold values that vary with the number of program/erase cycles that a block has undergone. Further techniques involve setting the read count threshold for a closed (fully written) block based upon the number reads it experienced prior to being closed. These techniques can also be applied at a sub-block, zone level.

Abstract translation: 提出了一些使用自适应计数器管理的读取擦除过程的免费技术。 在一组技术中，除了维持块的累积读计数器之外，还可以维持边界字行计数器以跟踪部分写入块的最近写入的字线或字线的读数。 使用的另一组技术读取计数阈值随着块所经历的编程/擦除周期数而变化。 进一步的技术涉及基于在关闭之前经历的数字读取来设置关闭（完全写入）块的读取计数阈值。 这些技术也可以应用于子区块级别。

公开(公告)号：US20230058836A1

公开(公告)日：2023-02-23

申请号：US17729331

申请日：2022-04-26

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Jayavel Pachamuthu ,  Dana Lee ,  Jiahui Yuan

IPC: G11C16/34 ,  G11C16/16 ,  G11C16/10 ,  G11C16/26 ,  G11C16/08

Abstract: A non-volatile memory system performs an erase process followed by a program process to program blocks of memory cells. The erase process comprises erasing followed by erase verification. The system recovers data and records a strike for blocks that fail a read process. In response to a particular block having a strike, the system performs an odd/even compare process during the erase process for the particular blocks having the strike such that the odd/even compare process comprises determining whether a number of memory cells connected to even word lines that have a different erase verify result than memory cells connected to odd word lines is greater than a defect test threshold. The system retires blocks from further use for storing host data that fail the odd/even compare process even if the block passes erase verification.

公开(公告)号：US11482531B2

公开(公告)日：2022-10-25

申请号：US17169987

申请日：2021-02-08

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ramy Nashed Bassely Said ,  Jiahui Yuan ,  Senaka Kanakamedala ,  Raghuveer S. Makala ,  Dana Lee

IPC: H01L29/788 ,  H01L27/11556 ,  H01L29/423 ,  H01L29/66

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel, a tunneling dielectric layer, and a vertical stack of memory elements located at levels of the electrically conductive layers between a respective vertically neighboring pair of the insulating layers. Each of the memory elements includes a first memory material portion, and a second memory material portion that is vertically spaced from and is electrically isolated from the first memory material portion by at least one blocking dielectric material portion.

公开(公告)号：US10083069B2

公开(公告)日：2018-09-25

申请号：US13928774

申请日：2013-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Seungjune Jeon ,  Idan Alrod ,  Eran Sharon ,  Dana Lee

IPC: G11C29/00 ,  G06F11/07 ,  G11C29/02 ,  G11C16/34

CPC classification number: G06F11/0751 ,  G11C16/3404 ,  G11C29/021 ,  G11C29/025 ,  G11C29/028

Abstract: A data storage device includes a non-volatile memory and a controller. The non-volatile memory includes a word line coupled to a plurality of storage elements. A method includes detecting a condition associated with a defect in the word line. A first subset of the plurality of storage elements and a second subset of the plurality of storage elements are determined based on an estimated location of the defect. The method further includes determining a first read threshold for the first subset and a second read threshold for the second subset.

公开(公告)号：US20180173447A1

公开(公告)日：2018-06-21

申请号：US15381104

申请日：2016-12-16

Applicant: SanDisk Technologies LLC

Inventor： Henry Chin ,  Sateesh Desireddi ,  Dana Lee ,  Ashwin D T ,  Harshul Gupta ,  Parth Amin ,  Jia Li

IPC: G06F3/06

CPC classification number: G06F3/0634 ,  G06F3/0619 ,  G06F3/0632 ,  G06F3/0679 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/26

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for dynamic read table generation. One apparatus includes a set of non-volatile storage cells. A controller for a set of non-volatile storage cells is configured to, in response to unsuccessfully reading a storage cell of the set of non-volatile storage cells using a parameter, read the storage cell using one or more shifted values. A controller for a set of non-volatile storage cells is configured to, in response to successfully reading a storage cell using one or more shifted values, add the one or more shifted values to a storage device.

公开(公告)号：US09805809B1

公开(公告)日：2017-10-31

申请号：US15253864

申请日：2016-08-31

Applicant: SanDisk Technologies LLC

Inventor： Zhenming Zhou ,  Guirong Liang ,  Gerrit Jan Hemink ,  Dana Lee ,  Chandu Gorla ,  Sarath Puthenthermadam ,  Deepanshu Dutta

IPC: G11C16/00 ,  G11C16/26 ,  G11C16/04 ,  G11C16/16 ,  G11C16/08

CPC classification number: G11C16/26 ,  G11C16/0433 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/16 ,  G11C16/3427

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for state-dependent read compensation. A set of non-volatile storage cells comprising a plurality of word lines. A controller is configured to perform a read operation on one or more word lines adjacent to a target word line. A controller is configured to determine a read setting for application to a target word line based on a result of a read operation on one or more word lines adjacent to the target word line. A controller is configured to perform a read operation on a target word line using a determined read setting.