公开(公告)号：US08963299B2

公开(公告)日：2015-02-24

申请号：US13660277

申请日：2012-10-25

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chien-Cheng Lin ,  Tsung-Hsien Hsu ,  Heng-Cheng Chu ,  Chao-Ya Yang ,  Chih-Ming Cheng

IPC: H01L23/552 ,  H01L21/00

CPC classification number: H01L24/27 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00015 ,  H01L2924/0781 ,  H01L2924/00

Abstract: A semiconductor package is provided, including: a substrate having at least a conductive pad; a semiconductor element disposed on the substrate; a conductive adhesive formed on top and side surfaces of the semiconductor element and extending to the conductive pad; and an electronic element disposed on the conductive adhesive. The conductive adhesive and the conductive pad form a shielding structure so as to prevent electromagnetic interference from occurring between the semiconductor element and the electronic element.

Abstract translation: 提供一种半导体封装，包括：具有至少导电焊盘的衬底; 设置在所述基板上的半导体元件; 形成在半导体元件的顶表面和侧表面上并延伸到导电焊盘的导电粘合剂; 以及设置在导电粘合剂上的电子元件。 导电粘合剂和导电垫形成屏蔽结构，以防止在半导体元件和电子元件之间发生电磁干扰。

公开(公告)号：US20200161756A1

公开(公告)日：2020-05-21

申请号：US16750459

申请日：2020-01-23

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Yuan Shih ,  Chih-Hsien Chiu ,  Yueh-Chiung Chang ,  Tsung-Li Lin ,  Chi-Pin Tsai ,  Chien-Cheng Lin ,  Tsung-Hsien Tsai ,  Heng-Cheng Chu ,  Ming-Fan Tsai

IPC: H01Q1/52 ,  H01Q1/48 ,  H01Q1/22 ,  H01L23/66 ,  H01L23/552 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01Q1/24 ,  H01Q9/42

Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

公开(公告)号：US10062582B2

公开(公告)日：2018-08-28

申请号：US14817624

申请日：2015-08-04

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Tsung-Hsien Tsai ,  Chih-Hsien Chiu ,  Hsin-Lung Chung ,  Chien-Cheng Lin

IPC: H01L21/60 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/552 ,  H01L23/00

CPC classification number: H01L21/4853 ,  H01L21/561 ,  H01L21/563 ,  H01L21/78 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/19 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits.

公开(公告)号：US20140210672A1

公开(公告)日：2014-07-31

申请号：US14107446

申请日：2013-12-16

Applicant: Siliconware Precision Industries Co., Ltd

Inventor： Chih-Hsien Chiu ,  Heng-Cheng Chu ,  Chien-Cheng Lin ,  Tsung-Hsien Tsai ,  Chao-Ya Yang ,  Yude Chu

IPC: H01Q1/38

Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.

Abstract translation: 提供一种电子封装结构，包括基板，设置在基板上的封装密封剂，以及对应于封装密封剂的布置区域的天线结构，并具有第一延伸层，设置在基板上的第二延伸层和 连接部分设置在第一延伸层和第二延伸层之间并且电连接到第一延伸层和第二延伸层。 通过在封装密封剂的配置区域上形成天线结构，不需要扩大基板，因此电子封装结构满足小型化要求。

公开(公告)号：US20240047440A1

公开(公告)日：2024-02-08

申请号：US17956653

申请日：2022-09-29

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Wen-Jung Tsai ,  Chih-Hsien Chiu ,  Chin-Chiang He ,  Ko-Wei Chang ,  Chien-Cheng Lin

IPC: H01L25/16 ,  H01L23/552 ,  H01L23/31 ,  H01L23/498 ,  H01L23/58 ,  H01L21/56

CPC classification number: H01L25/165 ,  H01L23/552 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/585 ,  H01L21/56

Abstract: An electronic package is provided and includes at least one electronic element, at least one first conductive structure and a second conductive structure disposed on one side of a carrier structure with at least one circuit layer, and an encapsulation layer covering the electronic element, the first conductive structure and the second conductive structure, where the first conductive structure is exposed from the encapsulation layer to externally connect required elements according to functional requirements.

公开(公告)号：US11749583B2

公开(公告)日：2023-09-05

申请号：US17379289

申请日：2021-07-19

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chih-Hsien Chiu ,  Siang-Yu Lin ,  Wen-Jung Tsai ,  Chia-Yang Chen ,  Chien-Cheng Lin

IPC: H01L23/42 ,  H01L23/367 ,  H01L23/16 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/42 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/367

Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.

公开(公告)号：US10587037B2

公开(公告)日：2020-03-10

申请号：US14107446

申请日：2013-12-16

Applicant: Siliconware Precision Industries Co., Ltd

Inventor： Chih-Hsien Chiu ,  Heng-Cheng Chu ,  Chien-Cheng Lin ,  Tsung-Hsien Tsai ,  Chao-Ya Yang ,  Yude Chu

IPC: H01Q1/38 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q1/24

Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.

公开(公告)号：US12100641B2

公开(公告)日：2024-09-24

申请号：US18223221

申请日：2023-07-18

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chih-Hsien Chiu ,  Siang-Yu Lin ,  Wen-Jung Tsai ,  Chia-Yang Chen ,  Chien-Cheng Lin

IPC: H01L23/42 ,  H01L21/56 ,  H01L23/16 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/42 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/367

Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.

公开(公告)号：US20230360997A1

公开(公告)日：2023-11-09

申请号：US18223221

申请日：2023-07-18

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chih-Hsien Chiu ,  Siang-Yu Lin ,  Wen-Jung Tsai ,  Chia-Yang Chen ,  Chien-Cheng Lin

IPC: H01L23/42 ,  H01L23/31 ,  H01L21/56 ,  H01L23/16 ,  H01L23/367

CPC classification number: H01L23/42 ,  H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L23/367

Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.

公开(公告)号：US20230163082A1

公开(公告)日：2023-05-25

申请号：US17571901

申请日：2022-01-10

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chih-Hsien Chiu ,  Wen-Jung Tsai ,  Chien-Cheng Lin ,  Ko-Wei Chang ,  Yu-Wei Yeh ,  Shun-Yu Chien ,  Chia-Yang Chen

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/49822 ,  H01L23/3121

Abstract: An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.