公开(公告)号：US20180158853A1

公开(公告)日：2018-06-07

申请号：US15887770

申请日：2018-02-02

Applicant: Sony Corporation

Inventor： Keiji Mabuchi

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/357 ,  H04N9/04

CPC classification number: H01L27/14605 ,  H01L27/14601 ,  H01L27/14603 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/035272 ,  H04N5/335 ,  H04N5/357 ,  H04N5/3575 ,  H04N5/3696 ,  H04N5/37455 ,  H04N5/37457 ,  H04N5/378 ,  H04N9/045

Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

公开(公告)号：US20180122847A1

公开(公告)日：2018-05-03

申请号：US15858803

申请日：2017-12-29

Applicant: Sony Corporation

Inventor： Keiji Mabuchi ,  Shunichi Urasaki

IPC: H01L27/146 ,  H04N5/3745 ,  H01L23/00 ,  H04N5/374 ,  H04N5/335

CPC classification number: H01L27/14636 ,  H01L24/14 ,  H01L24/17 ,  H01L27/14612 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12043 ,  H01L2924/13091 ,  H04N5/335 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/37457 ,  H04N5/379 ,  H01L2924/00 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device 32 in which micro pads 34, 37 are formed on the wiring layer side and a signal processing chip 33 having micro pads 35, 38 formed on the wiring layer at the positions corresponding to the micro pads 34, 37 of the MOS solid-state image pickup device 32 are connected by micro bumps 36, 39. In a semiconductor module including the MOS type solid-state image pickup device, at the same time an image processing speed can be increased, simultaneity within the picture can be realized and image quality can be improved, a manufacturing process can be facilitated, and a yield can be improved. Also, it becomes possible to decrease a power consumption required when all pixels or a large number of pixels is driven at the same time.

公开(公告)号：US09899435B2

公开(公告)日：2018-02-20

申请号：US15454290

申请日：2017-03-09

Applicant: Sony Corporation

Inventor： Keiji Mabuchi

IPC: H04N3/14 ,  H04N5/335 ,  H01L27/146 ,  H04N5/378 ,  H04N9/04 ,  H04N5/357

CPC classification number: H01L27/14605 ,  H01L27/14601 ,  H01L27/14603 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/035272 ,  H04N5/335 ,  H04N5/357 ,  H04N5/3575 ,  H04N5/3696 ,  H04N5/37455 ,  H04N5/37457 ,  H04N5/378 ,  H04N9/045

Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

公开(公告)号：US20180041725A1

公开(公告)日：2018-02-08

申请号：US15679839

申请日：2017-08-17

Applicant: SONY CORPORATION

Inventor： Takashi Abe ,  Nobuo Nakamura ,  Tomoyuki Umeda ,  Keiji Mabuchi ,  Hiroaki Fujita ,  Eiichi Funatsu ,  Hiroki Sato

IPC: H04N5/374 ,  H04N5/3745 ,  H04N3/14 ,  H04N5/335 ,  H04N9/04 ,  H04N5/378

CPC classification number: H04N5/374 ,  H04N3/155 ,  H04N5/335 ,  H04N5/3741 ,  H04N5/37457 ,  H04N5/3765 ,  H04N5/378 ,  H04N9/045

Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

公开(公告)号：US09781371B2

公开(公告)日：2017-10-03

申请号：US14957278

申请日：2015-12-02

Applicant: Sony Corporation

Inventor： Takeshi Yanagita ,  Keiji Mabuchi ,  Hiroaki Ishiwata

IPC: H04N5/335 ,  H04N5/3745 ,  H01L27/146 ,  H04N5/353 ,  H04N5/359 ,  H04N5/369 ,  H04N5/374 ,  H04N5/378

CPC classification number: H04N5/37457 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H04N5/3532 ,  H04N5/3591 ,  H04N5/3698 ,  H04N5/374 ,  H04N5/3742 ,  H04N5/378

Abstract: A solid state image sensor includes a pixel array, as well as charge-to-voltage converters, reset gates, and amplifiers each shared by a plurality of pixels in the array. The voltage level of the reset gate power supply is set higher than the voltage level of the amplifier power supply. Additionally, charge overflowing from photodetectors in the pixels may be discarded into the charge-to-voltage converters. The image sensor may also include a row scanner configured such that, while scanning a row in the pixel array to read out signals therefrom, the row scanner resets the charge in the photodetectors of the pixels sharing a charge-to-voltage converter with pixels on the readout row. The charge reset is conducted simultaneously with or prior to reading out the signals from the pixels on the readout row.

公开(公告)号：US20170237916A1

公开(公告)日：2017-08-17

申请号：US15585503

申请日：2017-05-03

Applicant: Sony Corporation

Inventor： Yorito Sakano ,  Takashi Abe ,  Keiji Mabuchi ,  Ryoji Suzuki ,  Hiroyuki Mori ,  Yoshiharu Kudoh ,  Fumihiko Koga ,  Takeshi Yanagita ,  Kazunobu Ota

IPC: H04N5/361 ,  H04N5/378 ,  H01L27/146 ,  H04N5/374

CPC classification number: H04N5/361 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14689 ,  H04N5/2176 ,  H04N5/374 ,  H04N5/37457 ,  H04N5/378

Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.

公开(公告)号：US09711559B2

公开(公告)日：2017-07-18

申请号：US15054058

申请日：2016-02-25

Applicant: SONY CORPORATION

Inventor： Yorito Sakano ,  Keiji Mabuchi ,  Takashi Machida

IPC: H01L27/146 ,  H04N5/355 ,  H04N5/359 ,  H04N5/3745 ,  H04N5/353

CPC classification number: H01L27/14643 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14616 ,  H01L27/14625 ,  H01L27/14638 ,  H01L27/14689 ,  H04N5/353 ,  H04N5/3559 ,  H04N5/3591 ,  H04N5/37452

Abstract: A solid-state imaging device includes a photoelectric conversion section configured to generate photocharges and a transfer gate that transfers the photocharges to a semiconductor region. A method for driving a unit pixel includes a step of accumulating photocharges in a photoelectric conversion section and a step of accumulating the photocharges in a semiconductor region. A method of forming a solid-state imaging device includes implanting ions into a well layer through an opening in a mask, implanting additional ions into the well layer through an opening in another mask, and implanting other ions into the well layer through an opening in yet another mask. An electronic device includes the solid-state imaging device.

公开(公告)号：US20170179172A1

公开(公告)日：2017-06-22

申请号：US15454290

申请日：2017-03-09

Applicant: Sony Corporation

Inventor： Keiji Mabuchi

IPC: H01L27/146 ,  H04N5/378

CPC classification number: H01L27/14605 ,  H01L27/14601 ,  H01L27/14603 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/035272 ,  H04N5/335 ,  H04N5/357 ,  H04N5/3575 ,  H04N5/3696 ,  H04N5/37455 ,  H04N5/37457 ,  H04N5/378 ,  H04N9/045

Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

公开(公告)号：US09621827B2

公开(公告)日：2017-04-11

申请号：US14401370

申请日：2013-05-15

Applicant: Sony Corporation

Inventor： Keiji Mabuchi ,  Masaki Sakakibara

IPC: H04N5/378 ,  H04N5/353 ,  H04N5/374 ,  H01L27/146 ,  H04N5/355 ,  H04N5/3745 ,  H04N5/376

CPC classification number: H04N5/353 ,  H01L27/14603 ,  H01L27/14609 ,  H04N5/3532 ,  H04N5/35581 ,  H04N5/3559 ,  H04N5/374 ,  H04N5/37452 ,  H04N5/376 ,  H04N5/378

Abstract: The present technology relates to an imaging element, a driving method, and an electronic apparatus that can decrease a voltage and increase a saturation signal amount.In each pixel configuring a pixel array unit, a photodiode receiving light from a subject and performing photoelectric conversion on the light and a first charge accumulating unit accumulating charges generated by the photodiode are provided. A reset gate unit to initialize the first charge accumulating unit is connected to the first charge accumulating unit through a third transfer gate unit. When the first charge accumulating unit is initialized, a voltage is applied to gate electrodes of the third transfer gate unit and the reset gate unit and a positive voltage is applied to a well region provided with a pixel to assist voltage application. Thereby, initialization is appropriately performed and a reset level is suppressed low. As a result, a voltage can be decreased and a saturation signal amount can be increased. The present technology can be applied to a solid-state imaging element.

公开(公告)号：US20160323528A1

公开(公告)日：2016-11-03

申请号：US15205464

申请日：2016-07-08

Applicant: Sony Corporation

Inventor： Keiji Mabuchi

IPC: H04N5/365 ,  H01L27/146 ,  H04N5/357 ,  H04N5/3745 ,  H04N5/378

CPC classification number: H04N5/365 ,  H01L27/14612 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14643 ,  H04N5/3575 ,  H04N5/374 ,  H04N5/37455 ,  H04N5/37457 ,  H04N5/378

Abstract: A solid-state imaging device includes a pixel unit in which a plurality of pixels converting physical quantities into electric signals are arranged in a two-dimensional shape, a vertical signal line for reading signals from the pixels, and column circuits arranged corresponding to columns of the pixel unit and collecting the signals from the vertical signal line at the inside of the pixel unit.