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公开(公告)号:US20180217078A1
公开(公告)日:2018-08-02
申请号:US15928681
申请日:2018-03-22
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Pagani , Bruno MURARI
CPC classification number: G01N27/223 , G01N17/04
Abstract: An integrated electronic device, for detecting for detecting changes in an environmental parameter indicative of an environment surrounding the device, includes: a first conductive element and a second conductive element; a measurement circuit including a first measurement terminal and a second measurement terminal respectively coupled to the first conductive element and the second conductive element. The measurement circuit is configured to provide an electrical potential difference between the first conductive element and the second conductive element is configured to determine a change in an impedance of an electromagnetic circuit including the first conductive element and the second conductive element and formed between the first measurement terminal and the second measurement terminal. The device determines that an increase in a presence of water within the environment has occurred in response to a decrease in a real part of the impedance of the electromagnetic circuit.
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公开(公告)号:US09966318B1
公开(公告)日:2018-05-08
申请号:US15420319
申请日:2017-01-31
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Pagani
IPC: H01L23/48 , H01L29/86 , G01R31/28 , H01L21/66 , H01L29/861 , H01L21/768
CPC classification number: H01L22/34 , G01R31/2834 , G01R31/2853 , G01R31/2884 , G01R31/44 , H01L21/76898 , H01L22/14 , H01L23/481 , H01L29/861
Abstract: A substrate includes first and second semiconductor layers doped with opposite conductivity type in contact with each other at a PN junction to form a junction diode. At least one through silicon via structure, formed by a conductive region surrounded laterally by an insulating layer, extends completely through the first semiconductor layer and partially through the second semiconductor layer with a back end embedded in, and in physical and electrical contact with, the second semiconductor layer. A first electrical connection is made to the first through silicon via structure and a second electrical connection is made to the first semiconductor layer. A testing current is applied to and sensed at the first and second electrical connections in order to detect a defect in the at least one through silicon via structure.
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13.
公开(公告)号:US09922945B2
公开(公告)日:2018-03-20
申请号:US14815527
申请日:2015-07-31
Applicant: STMicroelectronics S.r.l.
Inventor: Federico Giovanni Ziglioli , Alberto Pagani
IPC: H01L23/64 , H01L49/02 , H01L21/441 , H01L21/768 , H01L23/48 , H01L23/495 , H01L23/498 , H01L25/10 , H01L21/50 , H01L23/538 , H01L23/31 , H01L21/56 , H01L23/00
CPC classification number: H01L23/642 , H01L21/441 , H01L21/50 , H01L21/561 , H01L21/768 , H01L23/3128 , H01L23/48 , H01L23/49537 , H01L23/49551 , H01L23/49575 , H01L23/49805 , H01L23/49822 , H01L23/5385 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/97 , H01L25/105 , H01L28/40 , H01L2224/2919 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49109 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/181 , H01L2224/45099 , H01L2924/00012 , H01L2924/07802 , H01L2924/00
Abstract: A packaged semiconductor device includes a communication pad formed in a side surface, which is operatively coupled to a communication circuit so as to enable the establishing of a wireless communication channel to an adjacently positioned packaged semiconductor device. The communication pad may be formed upon cutting a block including the packaged semiconductor device and an appropriately positioned and dimensioned conductor.
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公开(公告)号:US09880219B2
公开(公告)日:2018-01-30
申请号:US14754906
申请日:2015-06-30
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Pagani
CPC classification number: G01R31/2891 , C12Q1/00 , C12Q2304/00 , C12Q2326/00 , G01R1/06794 , G01R31/2884 , H01L21/00 , H01L22/34 , H01L2221/00 , H01L2924/00
Abstract: A sensing structure is presented for use in testing integrated circuits on a substrate. The sensing structure includes a probe region corresponding to a conductive region for connecting to the integrated circuit. A first sensing region at least partially surrounds the probe region. A plurality of sensing elements connects in series such that a first of the plurality of sensing elements has two terminals respectively connected to the first sensing region and the probe region. And a second of the plurality of sensing elements has two terminals respectively connected to the probe region and a first reference potential.
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公开(公告)号:US09791303B2
公开(公告)日:2017-10-17
申请号:US14401332
申请日:2013-05-23
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Alberto Pagani , Bruno Murari , Federico Giovanni Ziglioli , Marco Ronchi , Giulio Ricotti
CPC classification number: G01D11/245 , B28B23/0031 , G01K17/00 , G01L1/18 , G01M5/00 , G01N33/383
Abstract: A package for a device to be inserted into a solid structure may include a building material that includes particles of one of micrometric and sub-micrometric dimensions. The device may include an integrated detection module having at least one integrated sensor and the package arranged to coat at least one portion of the device including the integrated detection module. A method aspect includes a method of manufacturing the device. A system aspect is for monitoring parameters in a solid structure that includes the device.
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16.
公开(公告)号:US09719874B2
公开(公告)日:2017-08-01
申请号:US14754788
申请日:2015-06-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Alessandro Motta , Alberto Pagani , Giovanni Sicurella
CPC classification number: G01L9/0052 , G01L9/065
Abstract: A pressure sensor device is to be positioned within a material where a mechanical parameter is measured. The pressure sensor device may include an IC having a ring oscillator with an inverter stage having first doped and second doped piezoresistor couples. Each piezoresistor couple may include two piezoresistors arranged orthogonal to one another with a same resistance value. Each piezoresistor couple may have first and second resistance values responsive to pressure. The IC may include an output interface coupled to the ring oscillator and configured to generate a pressure output signal based upon the first and second resistance values and indicative of pressure normal to the IC.
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公开(公告)号:US09638715B2
公开(公告)日:2017-05-02
申请号:US14339406
申请日:2014-07-23
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Alberto Pagani
IPC: G01R1/067 , G01R1/07 , G01R1/073 , G01R31/312
CPC classification number: G01R1/06761 , G01R1/06711 , G01R1/06716 , G01R1/06733 , G01R1/06766 , G01R1/07 , G01R1/07314 , G01R31/312
Abstract: An embodiment of a test apparatus for executing a test of a set of electronic devices having a plurality of electrically conductive terminals, the test apparatus including a plurality of electrically conductive test probes for exchanging electrical signals with the terminals, and coupling means for mechanically coupling the test probes with the electronic devices. In an embodiment, the coupling means includes insulating means for keeping each one of at least part of the test probes electrically insulated from at least one corresponding terminal during the execution of the test. Each test probe and the corresponding terminal form a capacitor for electro-magnetically coupling the test probe with the terminal.
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18.
公开(公告)号:US20170093024A1
公开(公告)日:2017-03-30
申请号:US15375761
申请日:2016-12-12
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Pagani
CPC classification number: H04B5/0075 , A61B5/6804 , A61B2562/164 , H01F38/14 , H01L23/5387 , H01L23/645 , H01L23/66 , H01L25/0655 , H01L2223/6677 , H01L2924/0002 , H01L2924/3025 , H01Q1/2225 , H01Q1/273 , H01Q1/526 , H01Q7/00 , H02J7/025 , H02J17/00 , H02J50/10 , H02J50/12 , H02J50/40 , H02J50/70 , H04B5/0031 , H04B5/0037 , H04B5/0081 , H01L2924/00
Abstract: Disclosed herein is an article including a garment, with a network formed on the garment. The network includes a main node with a main wired antenna, and at least one intermediate node with an intermediate wired antenna to be magnetically coupled to a respective device for that intermediate node. An electrical line electrically couples the main node to the at least one intermediate node. At least one electronic device is magnetically coupled to the intermediate wired antenna. A power supply unit is magnetically coupled to the main node via the main wired antenna thereof.
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公开(公告)号:US20170030966A1
公开(公告)日:2017-02-02
申请号:US15290386
申请日:2016-10-11
Applicant: STMicroelectronics S.r.l.
Inventor: Alberto Pagani
CPC classification number: G01R31/2889 , B62M25/04 , G01R1/0491 , G01R1/06727 , G01R1/07342
Abstract: A probe card is adapted for testing at least one integrated circuit that integrated on a corresponding at least one die of a semiconductor material wafer. The probe card includes a board adapted for the coupling to a tester apparatus. Several probes are coupled to the board. The probe card includes replaceable elementary units, wherein each unit includes at least one probe for contacting externally-accessible terminals of an integrated circuit under test. The replaceable elementary units are arranged so as to correspond to an arrangement of at least one die on the semiconductor material wafer containing integrated circuits to be tested.
Abstract translation: 探针卡适于测试集成在半导体材料晶片的相应的至少一个管芯上的至少一个集成电路。 探针卡包括适于耦合到测试仪器的板。 几个探头耦合到电路板。 探针卡包括可替换的基本单元,其中每个单元包括用于接触被测集成电路的外部可接近端子的至少一个探针。 可替换基本单元被布置成对应于包含要测试的集成电路的半导体材料晶片上的至少一个管芯的布置。
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公开(公告)号:US09514879B2
公开(公告)日:2016-12-06
申请号:US14479089
申请日:2014-09-05
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Alberto Pagani
CPC classification number: H01F38/14 , H01F2038/146 , H02J17/00 , H02J50/05 , H02J50/10 , H02J50/40 , H02J50/70 , H02J50/80 , H04B5/0012 , H04B5/0037 , H04B5/0075 , H04B5/0093
Abstract: An embodiment of an electronic system includes a first electronic circuit and a second electronic circuit. The electronic system further includes a resonant LC circuit having a resonance frequency for coupling the first electronic circuit and the second electronic circuit; each electronic circuit includes functional means for providing a signal at the resonance frequency to be transmitted to the other electronic circuit through the LC circuit and/or for receiving the signal from the other electronic circuit. The LC circuit also include capacitor means having at least one first capacitor plate included in the first electronic circuit and at least one second capacitor plate included in the second electronic circuit. The LC circuit further includes first inductor means included in the first electronic circuit and/or second inductor means included in the second electronic circuit. The at least one capacitor plate of each electronic circuit is coupled with the corresponding functional means through the possible corresponding inductor means.
Abstract translation: 电子系统的实施例包括第一电子电路和第二电子电路。 电子系统还包括具有用于耦合第一电子电路和第二电子电路的谐振频率的谐振LC电路; 每个电子电路包括用于提供谐振频率的信号的功能装置,以通过LC电路传输到另一电子电路和/或用于从另一电子电路接收信号。 LC电路还包括具有包括在第一电子电路中的至少一个第一电容器板和包括在第二电子电路中的至少一个第二电容器板的电容器装置。 LC电路还包括包括在第一电子电路中的第一电感器装置和/或包括在第二电子电路中的第二电感器装置。 每个电子电路的至少一个电容器板通过可能的相应的电感器装置与相应的功能装置耦合。
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