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    Protection Layer In CMOS Image Sensor Array Region
    14.
    发明申请
    Protection Layer In CMOS Image Sensor Array Region 有权
    CMOS图像传感器阵列区域中的保护层

    公开(公告)号：US20150189207A1

    公开(公告)日：2015-07-02

    申请号：US14144229

    申请日：2013-12-30

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Volume Chien ,  Yi-Sheng Liu ,  Chia-Yu Wei ,  Yun-Wei Cheng ,  Chi-Cherng Jeng

    IPC: H04N5/374

    CPC classification number: H04N5/374 ,  H01L27/14614 ,  H01L27/1462 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/0232 ,  H04N5/335

    Abstract: A semiconductor image sensor device having a conformal protective layer includes a semiconductor substrate a pixel-array region and a peripheral region. The conformal protective layer is disposed over a plurality of pixels having a photodiode and a plurality of transistors in the pixel-array region. Contacts to the plurality of transistors are surrounded by the conformal protective layer. In some embodiments, the conformal protective layer is the same material as transistor gate spacers in the peripheral region.

    Abstract translation: 具有共形保护层的半导体图像传感器装置包括半导体衬底，像素阵列区域和外围区域。 保形层设置在像素阵列区域中具有光电二极管和多个晶体管的多个像素上。 与多个晶体管的接触被保形层包围。 在一些实施例中，共形保护层与外围区域中的晶体管栅极间隔物相同。

    Method and Structure for Reducing Light Crosstalk in Integrated Circuit Device
    15.
    发明申请
    Method and Structure for Reducing Light Crosstalk in Integrated Circuit Device 有权
    集成电路设备中减轻光串扰的方法与结构

    公开(公告)号：US20150003777A1

    公开(公告)日：2015-01-01

    申请号：US13930717

    申请日：2013-06-28

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Allen Tseng ,  Che-Min Lin ,  Zen-Fong Huang ,  Volume Chien ,  Chi-Cherng Jeng

    IPC: G02B6/12 ,  H01L27/146 ,  G02B6/13

    CPC classification number: G02B6/12007 ,  G02B5/201 ,  G02B27/0018 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14685

    Abstract: The present disclosure provides an integrated circuit device comprising a substrate having a back surface and a sensing region disposed in the substrate and being operable to sense radiation projected towards the back surface of the substrate. The device further includes a waveguide disposed over the back surface of the substrate. The waveguide is aligned with the sensing region such that the waveguide is operable to transmit the radiation towards the aligned sensing region. The waveguide includes a waveguide wall, and an inner region disposed adjacent to the waveguide wall. A diffractive index of the waveguide wall is less than a diffractive index of the inner region.

    Abstract translation: 本公开提供了一种集成电路器件，其包括具有背表面和设置在衬底中的感测区域的衬底，并且可操作以感测朝向衬底的背表面投射的辐射。 该器件还包括布置在衬底的背面上的波导管。 波导与感测区域对准，使得波导可操作以将辐射传送到对准的感测区域。 波导包括波导壁和邻近波导壁设置的内部区域。 波导壁的衍射指数小于内部区域的衍射指数。

    PAD STRUCTURE LAYOUT FOR SEMICONDUCTOR DEVICE
    16.
    发明申请
    PAD STRUCTURE LAYOUT FOR SEMICONDUCTOR DEVICE 有权
    半导体器件的PAD结构布局

    公开(公告)号：US20150001658A1

    公开(公告)日：2015-01-01

    申请号：US13929172

    申请日：2013-06-27

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Shang-Yen Wu ,  I-Chih Chen ,  Yi-Sheng Liu ,  Volume Chien ,  Fu-Tsun Tsai ,  Chi-Cherng Jeng ,  Ying-Hao Chen

    IPC: H01L31/02

    CPC classification number: H01L27/1464 ,  H01L24/05 ,  H01L27/1463 ,  H01L27/14634 ,  H01L27/14636 ,  H01L2224/04042 ,  H01L2224/48463 ,  H01L2924/13091 ,  H01L2924/00

    Abstract: A semiconductor device including a light sensing region disposed on a substrate is provided that includes a bond structure having one or more patterned layers underlying the pad element. The pad element may be coupled to the light sensing region and may be formed in a first metal layer disposed on the substrate. A second metal layer of the device has a first bond region, a region of the second metal layer that underlies the pad element. This first bond region of the second metal layer includes a pattern of a plurality of conductive lines interposed by dielectric. A via connects the pad element and the second metal layer.

    Abstract translation: 提供了一种包括设置在基板上的光感测区域的半导体器件，其包括在衬垫元件下方具有一个或多个图案化层的接合结构。 焊盘元件可以耦合到光感测区域，并且可以形成在设置在衬底上的第一金属层中。 器件的第二金属层具有第一结合区域，第二金属层的位于衬垫元件下面的区域。 第二金属层的该第一接合区域包括插入介电体的多个导电线图案。 通孔连接垫元件和第二金属层。

    METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE
    19.
    发明申请
    METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE 有权

    公开(公告)号：US20220247936A1

    公开(公告)日：2022-08-04

    申请号：US17723425

    申请日：2022-04-18

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Zen-Fong Huang ,  Volume Chien

    IPC: H04N5/232 ,  H01L27/146 ,  H04N5/225

    Abstract: A photosensitive unit and a photo-insensitive unit are formed in a substrate. A lens is formed to cover the photosensitive unit and the photo-insensitive unit, and the lens has a single radius of curvature and an optical axis passing through a surface of the curvature at the center of the lens. The photosensitive unit is disposed at a first side of the optical axis and the photo-insensitive unit is disposed at a second side opposite to the first side of the optical axis, a light beam passing through the lens is simultaneously incident into the photosensitive unit and the photo-insensitive unit without being blocked, and the photosensitive unit detects the light beam while the photo-insensitive unit is ineffective in sensing the light beam. A conductive feature is formed over the substrate between the photosensitive unit and the photo-insensitive unit, wherein the optical axis of the lens passes the conductive feature.

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