公开(公告)号：US20170194289A1

公开(公告)日：2017-07-06

申请号：US15461796

申请日：2017-03-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Tse Chen ,  Yu-Chih Liu ,  Hui-Min Huang ,  Wei-Hung Lin ,  Jing Ruei Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L25/065 ,  H01L23/29 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/0652 ,  H01L21/561 ,  H01L21/563 ,  H01L23/00 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/15311

Abstract: The present disclosure relates to a package-on-package structure providing mechanical strength and warpage control. In some embodiments, the package-on-package structure includes a first set of conductive elements coupling a first package component to a second package component. A first molding material is arranged on the first package component. The first molding material surrounds the first set of conductive elements and outer sidewalls of the second package component and has a top surface below a top surface of the second package component. The stacked integrated chip structure further includes a second set of conductive elements that couples the second package component to a third package component.

公开(公告)号：US20160247782A1

公开(公告)日：2016-08-25

申请号：US15143892

申请日：2016-05-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Tse Chen ,  Yu-Chih Liu ,  Hui-Min Huang ,  Wei-Hung Lin ,  Jing Ruei Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/0652 ,  H01L21/561 ,  H01L21/563 ,  H01L23/00 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/15311

Abstract: A package on package structure providing mechanical strength and warpage control includes a first package component coupled to a second package component by a first set of conductive elements. A first polymer-comprising material is arranged between the first package component and the second package component. The first polymer-comprising material surrounds the first set of conductive elements and the second package component. A third package component is coupled to the second package component by a second set of conductive elements. An underfill is arranged on the second package component and surrounds the second set of conductive elements. The first polymer-comprising material extends past sidewalls of the underfill.

Abstract translation: 提供机械强度和翘曲控制的封装结构的封装结构包括通过第一组导电元件耦合到第二封装元件的第一封装元件。 第一聚合物包含材料布置在第一包装部件和第二包装部件之间。 第一含聚合物的材料包围第一组导电元件和第二封装元件。 第三封装部件通过第二组导电元件耦合到第二封装部件。 底部填充物布置在第二包装部件上并且包围第二组导电元件。 第一含聚合物的材料延伸穿过底部填充物的侧壁。

公开(公告)号：US20240321661A1

公开(公告)日：2024-09-26

申请号：US18679091

申请日：2024-05-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Shien Chen ,  Kuo-Ching Hsu ,  Wei-Hung Lin ,  Hui-Min Huang ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L23/3114 ,  H01L21/56 ,  H01L23/5384 ,  H01L24/81

Abstract: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.

公开(公告)号：US20240153896A1

公开(公告)日：2024-05-09

申请号：US18411314

申请日：2024-01-12

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Hui-Min Huang ,  Chih-Wei Lin ,  Tsai-Tsung Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538

CPC classification number: H01L24/05 ,  H01L21/481 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49866 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L21/568 ,  H01L23/49827 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/18162

Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.

公开(公告)号：US11842935B2

公开(公告)日：2023-12-12

申请号：US17318703

申请日：2021-05-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Shien Chen ,  Kuo-Ching Hsu ,  Wei-Hung Lin ,  Hui-Min Huang ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC: H01L23/31 ,  H01L23/538 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/3114 ,  H01L21/56 ,  H01L23/5384 ,  H01L24/81

Abstract: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.

公开(公告)号：US11545465B2

公开(公告)日：2023-01-03

申请号：US17113676

申请日：2020-12-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Tse Chen ,  Chung-Shi Liu ,  Chih-Wei Lin ,  Hui-Min Huang ,  Hsuan-Ting Kuo ,  Ming-Da Cheng

IPC: H01L23/02 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.

公开(公告)号：US11532498B2

公开(公告)日：2022-12-20

申请号：US16934394

申请日：2020-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Lin ,  Hui-Min Huang ,  Ai-Tee Ang ,  Yu-Peng Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/683 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L25/10 ,  H01L21/56 ,  H01L25/065

Abstract: A method comprises forming a plurality of interconnect structures including a dielectric layer, a metal line and a redistribution line over a carrier, attaching a semiconductor die on a first side of the plurality of interconnect structures, forming an underfill layer between the semiconductor die and the plurality of interconnect structures, mounting a top package on the first side the plurality of interconnect structures, wherein the top package comprises a plurality of conductive bumps, forming an encapsulation layer over the first side of the plurality of interconnect structures, wherein the top package is embedded in the encapsulation layer, detaching the carrier from the plurality of interconnect structures and mounting a plurality of bumps on a second side of the plurality of interconnect structures.

公开(公告)号：US11133285B2

公开(公告)日：2021-09-28

申请号：US16360411

申请日：2019-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Meng-Tse Chen ,  Yu-Chih Liu ,  Hui-Min Huang ,  Wei-Hung Lin ,  Jing Ruei Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L25/065 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L23/29

Abstract: The present disclosure, in some embodiments, relates to a method of forming a package. The method includes coupling a first package component to a second package component using a first set of conductive elements. A first polymer-comprising material is formed over the second package component and surrounding the first set of conductive elements. The first polymer-comprising material is cured to solidify the first polymer-comprising material. A part of the first polymer-comprising material is removed to expose an upper surface of the second package component. The second package component is coupled to a third package component using a second set of conductive elements that are formed onto the upper surface of the second package component.

公开(公告)号：US12027435B2

公开(公告)日：2024-07-02

申请号：US17818742

申请日：2022-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Shien Chen ,  Kuo-Ching Hsu ,  Wei-Hung Lin ,  Hui-Min Huang ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L23/3114 ,  H01L21/56 ,  H01L23/5384 ,  H01L24/81

Abstract: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.

公开(公告)号：US20240128148A1

公开(公告)日：2024-04-18

申请号：US18151222

申请日：2023-01-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chang-Jung Hsueh ,  Po-Yao Lin ,  Hui-Min Huang ,  Ming-Da Cheng ,  Kathy Yan

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H10B80/00

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H10B80/00 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2924/1011 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1611 ,  H01L2924/1616 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1631 ,  H01L2924/16315 ,  H01L2924/1632

Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.