Abstract:
A tunneling photovoltaic (“TPV”) device using a high-κ dielectric as a tunneling layer is disclosed. The TPV includes a P-type doped silicon semiconductor substrate. Formed on its surface is an interfacial layer, between the semiconductor substrate and the high-κ tunneling layer. Formed on the high-κ tunneling layer is an electrode layer, or stack electrode layer, receiving charge carriers that tunnel through the tunneling layer, generating a current when the device is illuminated by light. The tunneling layer can be hafnium oxide or other suitable high-κ dielectrics. A method of fabricating a high-κ TPV is also disclosed. The TPV device according to the embodiments has improved internal quantum efficiency.
Abstract:
Frequency divider circuits and architectures, and methods of implementing and using the same, are disclosed. In one embodiment, the frequency divider circuit includes a dynamic section that receives an input signal and outputs an intermediate signal that has a frequency lower than that of the input signal; and a static section that receives the intermediate signal and outputs a signal having a frequency that is lower than that of the intermediate signal. Stages in the dynamic and/or static section can be implemented using thin film transistors (TFTs). Embodiments of the present invention advantageously provide an approach that takes overcomes problems associated with the leakage and speed characteristics of TFTs.
Abstract:
The present invention relates to aqueous liquid compositions in which surfactant system is specifically selected so that it cleanses well, but is mild and adequately foaming. Further the composition tolerate relatively large amounts of emollient (to help mildness) while, surprisingly, showing better stability.
Abstract:
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
Abstract:
Process variation-tolerant diodes and diode-connected thin film transistors (TFTs), printed or patterned structures (e.g., circuitry) containing such diodes and TFTs, methods of making the same, and applications of the same for identification tags and sensors are disclosed. A patterned structure comprising a complementary pair of diodes or diode-connected TFTs in series can stabilize the threshold voltage (Vt) of a diode manufactured using printing or laser writing techniques. The present invention advantageously utilizes the separation between the Vt of an NMOS TFT (Vtn) and the Vt of a PMOS TFT (Vtp) to establish and/or improve stability of a forward voltage drop across a printed or laser-written diode. Further applications of the present invention relate to reference voltage generators, voltage clamp circuits, methods of controlling voltages on related or differential signal transmission lines, and RFID and EAS tags and sensors.
Abstract:
The invention relates to method of signaling temperature and/or benefit agent release using bar compositions comprising thermochromatic pigment or dye. In a preferred embodiment, the pigment is introduced in the form of a separate domain (e.g., separate chips) which separate chip or chips is combined with a surfactant-containing chips to form the final bar.
Abstract:
An information console is a system for providing information, entertainment and communication capabilities to any person or hospital patients, and those recovering at home comprising of a user interface for enabling the patient to interact with the system, a display unit for displaying video as well as providing visual feedback to the patient, an audio unit for outputting audio as well as providing audible feedback to the patient and a software system for responding to patient requests provided via the user interface to control the display unit and the audio unit. Also the same system is used by the persons undergoing recuperation from illness or injury at home for providing entertainment and communication capabilities.
Abstract:
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
Abstract:
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.
Abstract:
An apparatus including a circuit of n circuit levels formed over a substrate from a first level to a nth level, wherein n is greater than one, and each of the n circuit levels has a material parameter change that is at least in part caused by a thermal processing operation that is applied to more than one of the n circuit levels simultaneously. An apparatus including a circuit of a plurality of circuit levels, each of the plurality of circuit levels having substantially similar material parameters.