公开(公告)号：US20130135784A1

公开(公告)日：2013-05-30

申请号：US13307089

申请日：2011-11-30

申请人： Chung-En Kao ,  You-Hua Chou ,  Chih-Tsung Lee ,  Ming-Shiou Kuo

发明人： Chung-En Kao ,  You-Hua Chou ,  Chih-Tsung Lee ,  Ming-Shiou Kuo

IPC分类号： B25J11/00 ,  H01L21/687 ,  B25J15/00 ,  B25J17/00 ,  B25J18/00

CPC分类号： H01L21/6831 ,  H01L21/67742

摘要： A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment.

摘要翻译： 工件传送系统具有多个具有轴承和初级和次级变压器线圈的接头，其中提供给每个接头的初级变压器线圈和次级变压器线圈的功率在相应接头的主变压器线圈和次级变压器线圈之间产生互感。 第一对臂通过第一对接头可旋转地联接到叶片，其中第一对接头中的每一个的主变压器线圈可操作地耦合到第一对臂，并且每个臂的次级变压器线圈 第一对接头可操作地联接到叶片和位于叶片的介电工件保持表面下方的电极。 电极通过接头的变压器线圈非接触地通电，并且刀片可以通过反向电流方向和电压调节来夹紧和去夹紧工件。

公开(公告)号：US20070190742A1

公开(公告)日：2007-08-16

申请号：US11354952

申请日：2006-02-16

申请人： You-Hua Chou ,  Hung Chang ,  Chin Lan ,  Yi-Ming Chen

发明人： You-Hua Chou ,  Hung Chang ,  Chin Lan ,  Yi-Ming Chen

IPC分类号： H01L21/76

CPC分类号： H01L21/76232

摘要： A semiconductor device and method of manufacturing include an STI trench having a low-k dielectric material as a liner oxide layer and a bulk oxide trench fill layer.

摘要翻译： 半导体器件和制造方法包括具有低k电介质材料作为衬垫氧化物层的STI沟槽和主体氧化物沟槽填充层。

公开(公告)号：US20070020953A1

公开(公告)日：2007-01-25

申请号：US11186353

申请日：2005-07-21

申请人： Cheng-Yuan Tsai ,  Chih-Lung Lin ,  You-Hua Chou

发明人： Cheng-Yuan Tsai ,  Chih-Lung Lin ,  You-Hua Chou

IPC分类号： H01L21/31 ,  C23C8/00 ,  H01L21/469

CPC分类号： H01L21/31612 ,  C23C16/45523 ,  C23C16/45557 ,  C23C16/50 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76801

摘要： A method for forming a high density dielectric film by chemical vapor deposition. The method comprises: (a) a substrate is provided in a processing chamber; (b) a first gas is introduced into the processing chamber with a first pressure and adsorbed on the substrate, wherein the first gas comprises silicon-containing or carbon-containing gas; (c) the first gas is stopped, and the first pressure is lowered to a second pressure; (d) a second gas is introduced into the processing chamber with a third pressure, and forced to react with the first gas absorbed on the substrate and remained in the processing chamber, wherein the second gas comprises oxidizer or reduction agent; (e) the steps (b)˜(d) are repeated until a high density dielectric film is formed on the substrate.

摘要翻译： 一种通过化学气相沉积法形成高密度电介质膜的方法。 该方法包括：（a）在处理室中设置基板; （b）第一气体以第一压力被引入处理室并吸附在衬底上，其中第一气体包含含硅或含碳气体; （c）第一气体停止，第一压力降低到第二压力; （d）第二气体以第三压力被引入处理室，并被迫与吸收在基板上的第一气体反应并保留在处理室中，其中第二气体包括氧化剂或还原剂; （e）重复步骤（b）〜（d），直到在基板上形成高密度电介质膜。

公开(公告)号：US09026241B2

公开(公告)日：2015-05-05

申请号：US13404676

申请日：2012-02-24

申请人： Wen-Cheng Yang ,  Chung-En Kao ,  You-Hua Chou ,  Ming-Chih Tsai ,  Chen-Chia Chiang ,  Bo-Hung Lin ,  Chin-Hsiang Lin

发明人： Wen-Cheng Yang ,  Chung-En Kao ,  You-Hua Chou ,  Ming-Chih Tsai ,  Chen-Chia Chiang ,  Bo-Hung Lin ,  Chin-Hsiang Lin

IPC分类号： G06F19/00 ,  G05B9/03

CPC分类号： G05B9/03 ,  G05B23/0237 ,  G05B2219/37533 ,  G05B2219/45031

摘要： The present disclosure relates to semiconductor tool monitoring system having multiple sensors configured to concurrently and independently monitor processing conditions of a semiconductor manufacturing tool. In some embodiments, the disclosed tool monitoring system comprises a first sensor system configured to monitor one or more processing conditions of a semiconductor manufacturing tool and to generate a first monitoring response based thereupon. A redundant, second sensor system is configured to concurrently monitor the one or more processing conditions of the manufacturing tool and to generate a second monitoring response based thereupon. A comparison element is configured to compare the first and second monitoring responses, and if the responses deviate from one another (e.g., have a deviation greater than a threshold value) to generate a warning signal. By comparing the first and second monitoring responses, errors in the sensor systems can be detected in real time, thereby preventing yield loss.

摘要翻译： 本公开涉及具有多个传感器的半导体工具监视系统，其被配置为同时且独立地监视半导体制造工具的处理条件。 在一些实施例中，所公开的工具监控系统包括被配置为监视半导体制造工具的一个或多个处理条件并基于此产生第一监视响应的第一传感器系统。 冗余的第二传感器系统被配置为同时监视制造工具的一个或多个处理条件并且基于此产生第二监视响应。 比较元件被配置为比较第一和第二监测响应，以及如果响应彼此偏离（例如，具有大于阈值的偏差）以产生警告信号。 通过比较第一和第二监测响应，可以实时检测传感器系统中的误差，从而防止产量损失。

公开(公告)号：US08941232B2

公开(公告)日：2015-01-27

申请号：US13034263

申请日：2011-02-24

申请人： You-Hua Chou ,  Yi-Jen Lai ,  Chun-Jen Chen ,  Perre Kao

发明人： You-Hua Chou ,  Yi-Jen Lai ,  Chun-Jen Chen ,  Perre Kao

IPC分类号： H01L23/34 ,  H01L23/367 ,  H01L23/42

CPC分类号： H01L23/473 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/48 ,  H01L23/488 ,  H01L24/11 ,  H01L24/80 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/11849 ,  H01L2224/16145 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/15 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00

摘要： The mechanisms for forming metal bumps to connect to a cooling device (or a heat sink) described herein enable substrates with devices to dissipate heat generated more efficiently. In addition, the metal bumps allow customization of bump designs to meet the needs of different chips. Further, the usage of metal bumps between the semiconductor chip and cooling device enables advanced cooling by passing a cooling fluid between the bumps.

摘要翻译： 用于形成连接到本文所述的冷却装置（或散热器）的金属凸块的机构使得具有装置的基板能够更有效地散发产生的热量。 此外，金属凸块允许定制凹凸设计以满足不同芯片的需要。 此外，半导体芯片和冷却装置之间的金属凸块的使用能够通过在凸块之间传递冷却流体而进行先进的冷却。

公开(公告)号：US08541262B2

公开(公告)日：2013-09-24

申请号：US12874816

申请日：2010-09-02

申请人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

发明人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

IPC分类号： H01L23/50

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/03823 ,  H01L2224/03825 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05655 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/01046 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like.

公开(公告)号：US20130226327A1

公开(公告)日：2013-08-29

申请号：US13404676

申请日：2012-02-24

申请人： Wen-Cheng Yang ,  Chung-En Kao ,  You-Hua Chou ,  Ming-Chih Tsai ,  Chen-Chia Chiang ,  Bo-Hung Lin ,  Chin-Hsiang Lin

发明人： Wen-Cheng Yang ,  Chung-En Kao ,  You-Hua Chou ,  Ming-Chih Tsai ,  Chen-Chia Chiang ,  Bo-Hung Lin ,  Chin-Hsiang Lin

IPC分类号： G06F19/00 ,  G06F15/00

CPC分类号： G05B9/03 ,  G05B23/0237 ,  G05B2219/37533 ,  G05B2219/45031

摘要： The present disclosure relates to semiconductor tool monitoring system having multiple sensors configured to concurrently and independently monitor processing conditions of a semiconductor manufacturing tool. In some embodiments, the disclosed tool monitoring system comprises a first sensor system configured to monitor one or more processing conditions of a semiconductor manufacturing tool and to generate a first monitoring response based thereupon. A redundant, second sensor system is configured to concurrently monitor the one or more processing conditions of the manufacturing tool and to generate a second monitoring response based thereupon. A comparison element is configured to compare the first and second monitoring responses, and if the responses deviate from one another (e.g., have a deviation greater than a threshold value) to generate a warning signal. By comparing the first and second monitoring responses, errors in the sensor systems can be detected in real time, thereby preventing yield loss.

摘要翻译： 本公开涉及具有多个传感器的半导体工具监视系统，其被配置为同时且独立地监视半导体制造工具的处理条件。 在一些实施例中，所公开的工具监控系统包括被配置为监视半导体制造工具的一个或多个处理条件并基于此产生第一监视响应的第一传感器系统。 冗余的第二传感器系统被配置为同时监视制造工具的一个或多个处理条件并且基于此产生第二监视响应。 比较元件被配置为比较第一和第二监测响应，以及如果响应彼此偏离（例如，具有大于阈值的偏差）以产生警告信号。 通过比较第一和第二监测响应，可以实时检测传感器系统中的误差，从而防止产量损失。

公开(公告)号：US20130069233A1

公开(公告)日：2013-03-21

申请号：US13234299

申请日：2011-09-16

申请人： You-Hua Chou ,  Min Hao Hong ,  Jian-Shin Tsai ,  Miao-Cheng Liao ,  Hsiang Hsiang Ko

发明人： You-Hua Chou ,  Min Hao Hong ,  Jian-Shin Tsai ,  Miao-Cheng Liao ,  Hsiang Hsiang Ko

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure.

公开(公告)号：US07226875B2

公开(公告)日：2007-06-05

申请号：US10999547

申请日：2004-11-30

申请人： Cheng-Yuan Tsai ,  You-Hua Chou ,  Chih-Lung Lin

发明人： Cheng-Yuan Tsai ,  You-Hua Chou ,  Chih-Lung Lin

IPC分类号： H01L21/316 ,  H01L21/473

CPC分类号： H01L21/76801 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3105 ,  H01L21/31629 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834

摘要： A method for enhancing stability of a fluorinated silicon glass layer is disclosed. A fluorinated silicon glass layer provided on a substrate is subjected to a phosphorous-containing and hydrogen-containing gas such as phosphine (PH3), for example. The gas forms reactive hydrogen species which removes fluorine radicals and reactive phosphorous species which forms a moisture-gettering and ion-gettering phosphorious oxide film the layer.

摘要翻译： 公开了一种提高氟化硅玻璃层的稳定性的方法。 将设置在基板上的氟化硅玻璃层例如经受含磷和含氢气体如磷化氢（PH 3 N 3）。 气体形成反应性氢物质，其去除氟自由基和反应性磷物质，其形成吸湿和吸除离子的氧化磷膜。

公开(公告)号：US09287154B2

公开(公告)日：2016-03-15

申请号：US13486025

申请日：2012-06-01

申请人： Ming Huei Lien ,  Chia-Ho Chen ,  Shu-Fen Wu ,  Chih-Tsung Lee ,  You-Hua Chou

发明人： Ming Huei Lien ,  Chia-Ho Chen ,  Shu-Fen Wu ,  Chih-Tsung Lee ,  You-Hua Chou

IPC分类号： H01L21/677 ,  H01L21/68 ,  H01L21/67 ,  H01L21/3105

CPC分类号： H01L21/6776 ,  H01L21/3105 ,  H01L21/67115

摘要： Embodiments of an ultraviolet (UV) curing system for treating a semiconductor substrate such as a wafer are disclosed. The curing system generally includes a processing chamber, a wafer support for holding a wafer in the chamber, a UV radiation source disposed above the chamber, and a UV transparent window interspersed between the radiation source and wafer support. In one embodiment, the wafer support is provided by a belt conveyor operable to transport wafers through the chamber during UV curing. In another embodiment, the UV radiation source is a movable lamp unit that travels across the top of the chamber for irradiating the wafer. In another embodiment, the UV transparent window includes a UV radiation modifier that reduces the intensity of UV radiation on portions of the wafer positioned below the modifier. Various embodiments enhance wafer curing uniformity by normalizing UV intensity levels on the wafer.

摘要翻译： 公开了用于处理诸如晶片的半导体衬底的紫外（UV）固化系统的实施例。 固化系统通常包括处理室，用于在室中保持晶片的晶片支撑件，设置在室上方的UV辐射源，以及散布在辐射源和晶片支撑件之间的UV透明窗口。 在一个实施例中，晶片支撑件由带式输送机提供，其可操作以在UV固化期间将晶片传送通过室。 在另一个实施例中，UV辐射源是可移动的灯单元，其移动穿过室的顶部以照射晶片。 在另一个实施方案中，UV透明窗口包括UV辐射调节剂，其降低位于调节剂下方的晶片部分上的UV辐射强度。 各种实施例通过使晶片上的UV强度水平归一化来增强晶片固化均匀性。