公开(公告)号：US08759949B2

公开(公告)日：2014-06-24

申请号：US12708287

申请日：2010-02-18

申请人： Chen-Hua Yu ,  Hon-Lin Huang ,  Kuo-Ching Hsu ,  Chen-Shien Chen

发明人： Chen-Hua Yu ,  Hon-Lin Huang ,  Kuo-Ching Hsu ,  Chen-Shien Chen

IPC分类号： H01L29/40 ,  H01L23/48 ,  H01L23/52 ,  H01L21/44

CPC分类号： H01L23/481 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/525 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184 ,  H01L2224/13583 ,  H01L2224/13655 ,  H01L2224/81001 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside, and a conductive via penetrating the semiconductor substrate. The conductive via includes a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is on the backside of the semiconductor substrate and electrically connected to the back end of the conductive via. A passivation layer is over the RDL, with an opening in the passivation layer, wherein a portion of the RDL is exposed through the opening. A copper pillar has a portion in the opening and electrically connected to the RDL.

摘要翻译： 集成电路结构包括具有前侧和后侧的半导体衬底以及穿透半导体衬底的导电通路。 导电通孔包括延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面并电连接到导电通孔的后端。 钝化层在RDL上方，在钝化层中具有开口，其中RDL的一部分通过开口露出。 铜柱在开口中具有一部分并与RDL电连接。

公开(公告)号：US20110165776A1

公开(公告)日：2011-07-07

申请号：US13050424

申请日：2011-03-17

申请人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Hon-Lin Huang

发明人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Hon-Lin Huang

IPC分类号： H01L21/768

CPC分类号： H01L24/11 ,  H01L23/481 ,  H01L24/05 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/13024 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13155 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor substrate and connected to the back end of the TSV. A passivation layer is over the RDL with an opening formed in the passivation layer, wherein a portion of a top surface of the RDL and a sidewall of the RDL are exposed through the opening. A metal finish is formed in the opening and contacting the portion of the top surface and the sidewall of the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底，其中TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）形成在半导体衬底的背面上并连接到TSV的后端。 钝化层在RDL上方，其中在钝化层中形成有开口，其中RDL的顶表面的一部分和RDL的侧壁通过开口露出。 在开口处形成金属表面，并与RDL的顶表面和侧壁的部分接触。

公开(公告)号：US20100276787A1

公开(公告)日：2010-11-04

申请号：US12708287

申请日：2010-02-18

申请人： Chen-Hua Yu ,  Hon-Lin Huang ,  Kuo-Ching Hsu ,  Chen-Shien Chen

发明人： Chen-Hua Yu ,  Hon-Lin Huang ,  Kuo-Ching Hsu ,  Chen-Shien Chen

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L21/3205

CPC分类号： H01L23/481 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/525 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184 ,  H01L2224/13583 ,  H01L2224/13655 ,  H01L2224/81001 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside, and a conductive via penetrating the semiconductor substrate. The conductive via includes a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is on the backside of the semiconductor substrate and electrically connected to the back end of the conductive via. A passivation layer is over the RDL, with an opening in the passivation layer, wherein a portion of the RDL is exposed through the opening. A copper pillar has a portion in the opening and electrically connected to the RDL.

摘要翻译： 集成电路结构包括具有前侧和后侧的半导体衬底以及穿透半导体衬底的导电通路。 导电通孔包括延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面并电连接到导电通孔的后端。 钝化层在RDL上方，在钝化层中具有开口，其中RDL的一部分通过开口露出。 铜柱在开口中具有一部分并与RDL电连接。

公开(公告)号：US20090160061A1

公开(公告)日：2009-06-25

申请号：US12206349

申请日：2008-09-08

申请人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Boe Su ,  Hon-Lin Huang

发明人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Boe Su ,  Hon-Lin Huang

IPC分类号： H01L23/532

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/81894 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00

摘要： The present disclosure provide an integrated circuit. The integrated circuit includes a through-silicon-via (TSV) trench configured in a semiconductor substrate; a conductive pad formed on the semiconductor substrate, the conductive pad being adjacent the TSV trench; a silicon nitride layer disposed over the conductive pad and in the TSV trench; a titanium layer disposed on the silicon nitride layer; a titanium nitride layer disposed on the titanium layer; and a copper layer disposed on the titanium nitride layer.

摘要翻译： 本公开提供集成电路。 集成电路包括配置在半导体衬底中的穿硅通孔（TSV）沟槽; 形成在所述半导体衬底上的导电焊盘，所述导电焊盘与所述TSV沟槽相邻; 设置在所述导电焊盘和所述TSV沟槽中的氮化硅层; 设置在氮化硅层上的钛层; 设置在钛层上的氮化钛层; 以及设置在氮化钛层上的铜层。

公开(公告)号：US07928534B2

公开(公告)日：2011-04-19

申请号：US12347742

申请日：2008-12-31

申请人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Hon-Lin Huang

发明人： Kuo-Ching Hsu ,  Chen-Shien Chen ,  Hon-Lin Huang

IPC分类号： H01L29/41

CPC分类号： H01L24/11 ,  H01L23/481 ,  H01L24/05 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/13024 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13155 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor substrate and connected to the back end of the TSV. A passivation layer is over the RDL with an opening formed in the passivation layer, wherein a portion of a top surface of the RDL and a sidewall of the RDL are exposed through the opening. A metal finish is formed in the opening and contacting the portion of the top surface and the sidewall of the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底，其中TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）形成在半导体衬底的背面上并连接到TSV的后端。 钝化层在RDL上方，其中在钝化层中形成有开口，其中RDL的顶表面的一部分和RDL的侧壁通过开口露出。 在开口处形成金属表面，并与RDL的顶表面和侧壁的部分接触。

公开(公告)号：US20110049706A1

公开(公告)日：2011-03-03

申请号：US12831819

申请日：2010-07-07

申请人： Hon-Lin Huang ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Chen-Shien Chen

发明人： Hon-Lin Huang ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Chen-Shien Chen

IPC分类号： H01L23/498

CPC分类号： H01L24/11 ,  H01L23/3157 ,  H01L23/481 ,  H01L24/13 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11823 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13027 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/818 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate; a conductive via (TSV) passing through the semiconductor substrate; and a copper-containing post overlying the semiconductor substrate and electrically connected to the conductive via.

摘要翻译： 集成电路结构包括半导体衬底; 穿过半导体衬底的导电通孔（TSV）; 以及覆盖半导体衬底并电连接到导电通孔的含铜柱。

公开(公告)号：US20080303154A1

公开(公告)日：2008-12-11

申请号：US11811660

申请日：2007-06-11

申请人： Hon-Lin Huang ,  Boe Su ,  Li-Hsin Tseng ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

发明人： Hon-Lin Huang ,  Boe Su ,  Li-Hsin Tseng ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC分类号： H01L23/528 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/05 ,  H01L2221/6834 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043

摘要： An integrated circuit structure and methods for forming the same are provided. The method includes providing a substrate; forming a through-silicon via (TSV) opening extending into the substrate; forming an under-bump metallurgy (UBM) in the TSV opening, wherein the UBM extends out of the TSV opening; filling the TSV opening with a metallic material; forming a patterned cap layer on the metallic material; and etching a portion of the UBM outside the TSV opening, wherein the patterned cap layer is used as a mask.

摘要翻译： 提供一种集成电路结构及其形成方法。 该方法包括提供基板; 形成延伸到衬底中的穿硅通孔（TSV）开口; 在TSV开口中形成凸块下冶金（UBM），其中UBM延伸出TSV开口; 用金属材料填充TSV开口; 在所述金属材料上形成图案化的盖层; 并且将所述UBM的一部分蚀刻在所述TSV开口外部，其中所述图案化盖层用作掩模。

公开(公告)号：US08736050B2

公开(公告)日：2014-05-27

申请号：US12831819

申请日：2010-07-07

申请人： Hon-Lin Huang ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Chen-Shien Chen

发明人： Hon-Lin Huang ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Chen-Shien Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L23/3157 ,  H01L23/481 ,  H01L24/13 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11823 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13027 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/818 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate; a conductive via (TSV) passing through the semiconductor substrate; and a copper-containing post overlying the semiconductor substrate and electrically connected to the conductive via.

摘要翻译： 集成电路结构包括半导体衬底; 穿过半导体衬底的导电通孔（TSV）; 以及覆盖半导体衬底并电连接到导电通孔的含铜柱。

公开(公告)号：US20120056328A1

公开(公告)日：2012-03-08

申请号：US12874816

申请日：2010-09-02

申请人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

发明人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

IPC分类号： H01L23/50 ,  H01L21/28

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/03823 ,  H01L2224/03825 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05655 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/01046 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like.

摘要翻译： 提供了利用芯片边缘触点的半导体器件。 集成电路管芯具有后钝化层，其具有填充有从接触件延伸到管芯边缘的导电材料的沟槽，从而形成管芯边缘接触。 可选地，贯穿衬底通孔可以沿着管芯边缘定位，使得沟槽中的导电材料电连接到贯穿衬底通孔，从而形成更大的管芯边缘接触。 集成电路管芯可以放置在多管芯封装中，其中多管芯封装包括具有垂直于集成电路管芯的主表面的主表面的壁。 模边缘触点电耦合到多模封装的壁上的触点。 多管芯封装可以包括用于连接到另一衬底的边缘触点，例如印刷电路板，封装衬底，高密度互连等。

公开(公告)号：US08097953B2

公开(公告)日：2012-01-17

申请号：US12259879

申请日：2008-10-28

申请人： Ming-Hong Tseng ,  Kai-Ming Ching ,  Chen-Shien Chen ,  Ching-Wen Hsiao ,  Hon-Lin Huang ,  Tsung-Ding Wang

发明人： Ming-Hong Tseng ,  Kai-Ming Ching ,  Chen-Shien Chen ,  Ching-Wen Hsiao ,  Hon-Lin Huang ,  Tsung-Ding Wang

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05568 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/00

摘要： A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective coating and a second protruding portion of the TSV has an isolation liner. The system further includes a second substrate and a joint interface structure that bonds the second substrate to the first substrate at the conductive protective coating of the first protruding portion of the TSV.

摘要翻译： 提出了一种制造叠层半导体衬底的系统，结构和方法。 第一基板包括第一侧和第二侧。 贯穿基板通孔（TSV）从第一基板的第一侧突出。 TSV的第一突出部分具有导电保护涂层，并且TSV的第二突出部分具有隔离衬垫。 该系统还包括在TSV的第一突出部分的导电保护涂层处将第二衬底与第一衬底结合的第二衬底和接合界面结构。