公开(公告)号：US09875986B2

公开(公告)日：2018-01-23

申请号：US15053723

申请日：2016-02-25

申请人： International Business Machines Corporation

发明人： Katsuyuki Sakuma ,  Thomas Weiss

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/75 ,  H01L2224/03464 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/1701 ,  H01L2224/17104 ,  H01L2224/75101 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/75744 ,  H01L2224/75753 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/75901 ,  H01L2224/81012 ,  H01L2224/81047 ,  H01L2224/81048 ,  H01L2224/81075 ,  H01L2224/81121 ,  H01L2224/812 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/81898 ,  H01L2224/81935 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/00012

摘要： A fluxless bonding process is provided. An array of micro solder bumps of a first semiconductor structure is aligned to an array of bonding pads of a second semiconductor structure under an applied bonding force. An environment is provided to prevent oxides from forming on the solder bump structures and bonding pads during the bonding process. A scrubbing process is performed at a given scrubbing frequency and amplitude to scrub the micro solder bumps against the bonding pads in a direction perpendicular to the bonding. Heat is applied to at least the first semiconductor structure to melt and bond the micro solder bumps to the bonding pads. The first semiconductor structure is cooled down to solidify the molten solder. Coplanarity is maintained between the bonding surfaces of the semiconductor structures within a given tolerance during the scrubbing and cooling steps until solidification of the micro solder bumps.

公开(公告)号：US09716066B2

公开(公告)日：2017-07-25

申请号：US14779022

申请日：2013-06-29

申请人： Intel Corporation

发明人： Kevin J. Lee ,  James Y. Jeong ,  Hsiao-Kang Chang ,  John Muirhead ,  Adwait Telang ,  Puneesh Puri ,  Jiho Kang ,  Nitin M. Patel

IPC分类号： H01L23/538 ,  H01L21/768 ,  H01L23/48 ,  H01L23/31 ,  H01L23/00 ,  H01L21/683

CPC分类号： H01L23/5384 ,  H01L21/6835 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03424 ,  H01L2224/03464 ,  H01L2224/03823 ,  H01L2224/03825 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/116 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13611 ,  H01L2224/13616 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/16145 ,  H01L2924/13091 ,  H01L2924/381 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01073 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014

摘要： A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through-silicon vias (TSVs) and using a “plate through resist” type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow.

公开(公告)号：US09287143B2

公开(公告)日：2016-03-15

申请号：US13939966

申请日：2013-07-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  Tsung-Yuan Yu ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Hao-Yi Tsai ,  Mirng-Ji Lii ,  Chen-Hua Yu

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L21/563 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/11464 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/3205 ,  H01L2224/32225 ,  H01L2224/33135 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/831 ,  H01L2224/83191 ,  H01L2224/92225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method and apparatus for a reinforced package are provided. A package component may be electrically coupled to a device through a plurality of electrical connections. A molding underfill may be interposed between the package component and the device and may encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The package component may also include a molding compound. The plurality of the electrical connections may extend through the molding compound with the molding underfill interposed between the molding compound and the device to encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The molding underfill may extend up one or more sides of the package component.

摘要翻译： 提供了一种用于增强包装的方法和装置。 封装部件可以通过多个电连接件电耦合到器件。 模制底部填充物可以插入在包装部件和装置之间，并且可以将多个电连接或多个电连接的子集封装在包装部件和装置之间。 包装组分还可以包括模塑料。 多个电连接可以延伸穿过模制化合物，其中模制底部填充物介于模制化合物和装置之间，以封装多个电连接或封装部件与装置之间的多个电连接的子集。 成型底部填充物可以向包装部件的一侧或多侧延伸。

公开(公告)号：US20140159223A1

公开(公告)日：2014-06-12

申请号：US13939966

申请日：2013-07-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  Tsung-Yuan Yu ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Hao-Yi Tsai ,  Mirng-Ji Lii ,  Chen-Hua Yu

IPC分类号： H01L23/31 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/11464 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/3205 ,  H01L2224/32225 ,  H01L2224/33135 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/831 ,  H01L2224/83191 ,  H01L2224/92225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method and apparatus for a reinforced package are provided. A package component may be electrically coupled to a device through a plurality of electrical connections. A molding underfill may be interposed between the package component and the device and may encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The package component may also include a molding compound. The plurality of the electrical connections may extend through the molding compound with the molding underfill interposed between the molding compound and the device to encapsulate the plurality of electrical connections or a subset of the plurality of electrical connections between the package component and the device. The molding underfill may extend up one or more sides of the package component.

摘要翻译： 提供了一种用于增强包装的方法和装置。 封装部件可以通过多个电连接件电耦合到器件。 模制底部填充物可以插入在包装部件和装置之间，并且可以将多个电连接或多个电连接的子集封装在包装部件和装置之间。 包装组分还可以包括模塑料。 多个电连接可以延伸穿过模制化合物，其中模制底部填充物介于模制化合物和装置之间，以封装多个电连接或封装部件与装置之间的多个电连接的子集。 成型底部填充物可以向包装部件的一侧或多侧延伸。

公开(公告)号：US09070676B2

公开(公告)日：2015-06-30

申请号：US14050193

申请日：2013-10-09

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L21/768

CPC分类号： H01L24/11 ,  H01L21/3213 ,  H01L21/32139 ,  H01L21/4853 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/0362 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05578 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05664 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/1111 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/81815 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00

摘要： An apparatus relating generally to a substrate is disclosed. In this apparatus, a first metal layer is on the substrate. The first metal layer has an opening. The opening of the first metal layer has a bottom and one or more sides extending from the bottom. A second metal layer is on the first metal layer. The first metal layer and the second metal layer provide a bowl-shaped structure. An inner surface of the bowl-shaped structure is defined responsive to the opening of the first metal layer and the second metal layer thereon. The opening of the bowl-shaped structure is configured to receive and at least partially retain a bonding material during a reflow process.

摘要翻译： 公开了一般涉及基板的装置。 在该装置中，第一金属层位于基板上。 第一金属层具有开口。 第一金属层的开口具有从底部延伸的底部和一个或多个侧面。 第二金属层位于第一金属层上。 第一金属层和第二金属层提供碗形结构。 碗形结构的内表面是响应于其上的第一金属层和第二金属层的开口而定义的。 碗形结构的开口构造成在回流过程期间接收并且至少部分地保持接合材料。

公开(公告)号：US20130181338A1

公开(公告)日：2013-07-18

申请号：US13349405

申请日：2012-01-12

申请人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/20

CPC分类号： H01L23/3192 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3157 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/11464 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/73104 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A structure comprises a post passivation interconnect layer formed over a semiconductor substrate, a metal bump formed over the post passivation interconnect layer and a molding compound layer formed over the semiconductor substrate. A lower portion of the metal bump is embedded in the molding compound layer and a middle portion of the metal bump is surrounded by a concave meniscus molding compound protection layer.

摘要翻译： 一种结构包括形成在半导体衬底上的后钝化互连层，形成在后钝化互连层上的金属凸块和形成在半导体衬底上的模塑复合层。 金属凸块的下部嵌入在模塑料层中，并且金属凸块的中间部分被凹弯月面模塑料保护层包围。

公开(公告)号：US20120056328A1

公开(公告)日：2012-03-08

申请号：US12874816

申请日：2010-09-02

申请人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

发明人： Yi-Jen Lai ,  You-Hua Chou ,  Hon-Lin Huang ,  Huai-Tei Yang

IPC分类号： H01L23/50 ,  H01L21/28

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/03823 ,  H01L2224/03825 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05655 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/01046 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like.

摘要翻译： 提供了利用芯片边缘触点的半导体器件。 集成电路管芯具有后钝化层，其具有填充有从接触件延伸到管芯边缘的导电材料的沟槽，从而形成管芯边缘接触。 可选地，贯穿衬底通孔可以沿着管芯边缘定位，使得沟槽中的导电材料电连接到贯穿衬底通孔，从而形成更大的管芯边缘接触。 集成电路管芯可以放置在多管芯封装中，其中多管芯封装包括具有垂直于集成电路管芯的主表面的主表面的壁。 模边缘触点电耦合到多模封装的壁上的触点。 多管芯封装可以包括用于连接到另一衬底的边缘触点，例如印刷电路板，封装衬底，高密度互连等。

公开(公告)号：US11664335B2

公开(公告)日：2023-05-30

申请号：US15358038

申请日：2016-11-21

申请人： Semikron Elektronik GmbH & Co., KG

发明人： Wolfgang-Michael Schulz

IPC分类号： H01L23/00 ,  H01L23/488

CPC分类号： H01L24/05 ,  H01L23/488 ,  H01L24/03 ,  H01L24/08 ,  H01L24/48 ,  H01L24/85 ,  H01L24/45 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/03462 ,  H01L2224/03823 ,  H01L2224/04042 ,  H01L2224/05005 ,  H01L2224/0508 ,  H01L2224/0516 ,  H01L2224/05023 ,  H01L2224/0558 ,  H01L2224/0566 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05179 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05583 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05679 ,  H01L2224/05684 ,  H01L2224/08503 ,  H01L2224/45005 ,  H01L2224/45015 ,  H01L2224/4554 ,  H01L2224/45147 ,  H01L2224/4847 ,  H01L2224/48247 ,  H01L2224/48506 ,  H01L2224/48507 ,  H01L2224/48855 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2224/05171 ,  H01L2924/00014 ,  H01L2224/05179 ,  H01L2924/00014 ,  H01L2224/05172 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00014 ,  H01L2224/0516 ,  H01L2924/00014 ,  H01L2224/05118 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05664 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/01074 ,  H01L2224/05186 ,  H01L2924/01022 ,  H01L2224/45005 ,  H01L2924/2076 ,  H01L2224/45147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/00014 ,  H01L2224/43848 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/013 ,  H01L2924/01014

摘要： A power semiconductor chip having: a semiconductor component body; a multilayer metallization arranged on the semiconductor component body; and a nickel layer arranged over the semiconductor component body. The invention further relates to a method for producing a power semiconductor chip and to a power semiconductor device. The invention provides a power semiconductor chip which has a metallization to which a copper wire, provided without a thick metallic coating, can be reliably bonded without damage to the power semiconductor chip during bonding.

公开(公告)号：US20170103963A1

公开(公告)日：2017-04-13

申请号：US15053723

申请日：2016-02-25

申请人： International Business Machines Corporation

发明人： Katsuyuki Sakuma ,  Thomas Weiss

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/75 ,  H01L2224/03464 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/1701 ,  H01L2224/17104 ,  H01L2224/75101 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/75744 ,  H01L2224/75753 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/75901 ,  H01L2224/81012 ,  H01L2224/81047 ,  H01L2224/81048 ,  H01L2224/81075 ,  H01L2224/81121 ,  H01L2224/812 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/81898 ,  H01L2224/81935 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/00012

摘要： A fluxless bonding process is provided. An array of micro solder bumps of a first semiconductor structure is aligned to an array of bonding pads of a second semiconductor structure under an applied bonding force. An environment is provided to prevent oxides from forming on the solder bump structures and bonding pads during the bonding process. A scrubbing process is performed at a given scrubbing frequency and amplitude to scrub the micro solder bumps against the bonding pads in a direction perpendicular to the bonding. Heat is applied to at least the first semiconductor structure to melt and bond the micro solder bumps to the bonding pads. The first semiconductor structure is cooled down to solidify the molten solder. Coplanarity is maintained between the bonding surfaces of the semiconductor structures within a given tolerance during the scrubbing and cooling steps until solidification of the micro solder bumps.

公开(公告)号：US20160049371A1

公开(公告)日：2016-02-18

申请号：US14779022

申请日：2013-06-29

申请人： INTEL CORPORATION

发明人： Kevin J. Lee ,  James Y. Jeong ,  Hsiao-Kang Chang ,  John Muirhead ,  Adwait Telang ,  Puneesh Puri ,  Jiho Kang ,  Nitin M. Patel

IPC分类号： H01L23/538 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/5384 ,  H01L21/6835 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03424 ,  H01L2224/03464 ,  H01L2224/03823 ,  H01L2224/03825 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/116 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13611 ,  H01L2224/13616 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/16145 ,  H01L2924/13091 ,  H01L2924/381 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01073 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014

摘要： A 3D interconnect structure and method of manufacture are described in which metal redistribution layers (RDLs) are integrated with through-silicon vias (TSVs) and using a “plate through resist” type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and polish stop layer during the process flow.

摘要翻译： 描述了三维互连结构和制造方法，其中金属再分布层（RDL）与硅通孔（TSV）集成并且使用“平板通过抗蚀剂”型工艺流程。 氮化硅或碳化硅钝化层可以设置在薄化的器件晶片背面和RDL之间，以在工艺流程期间提供密封屏障和抛光停止层。