Method of forming of a semiconductor film, method of manufacture of a semiconductor device and a semiconductor device
    11.
    发明授权
    Method of forming of a semiconductor film, method of manufacture of a semiconductor device and a semiconductor device 有权
    半导体膜的形成方法,半导体装置的制造方法以及半导体装置

    公开(公告)号:US07968434B2

    公开(公告)日:2011-06-28

    申请号:US12271488

    申请日:2008-11-14

    IPC分类号: H01L21/20 H01L21/36

    摘要: This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO2, forming a nucleation site and/or a seed layer. Second, source gases for semiconductor film formation, for e.g., SiH4, GeH4, etc., are supplied into the chamber, thereby forming a semiconductor film.

    摘要翻译: 本发明提供了一种在低于400℃的温度下在电介质上形成半导体膜的方法。薄膜晶体管(TFT),片上传感器,片上微机电系统(MEMS)和单片3D集成 电路。 对于这些应用,将半导体膜形成在低于400℃是有利的,因为更高的温度可能破坏任何下面的器件和/或衬底。 本发明成功地实现了使用二硼烷的锗膜的低温生长。 首先,在低于400℃的温度下将二硼烷气体供应到反应室中。二硼烷在给定温度下自身分解,并且分解的硼附着到电介质的表面,例如SiO 2,形成成核位置和/或 种子层。 其次,将例如SiH 4,GeH 4等的半导体膜形成用源气体供给到室内,形成半导体膜。

    Semiconductor device and its manufacturing method
    13.
    发明申请
    Semiconductor device and its manufacturing method 有权
    半导体器件及其制造方法

    公开(公告)号:US20050253272A1

    公开(公告)日:2005-11-17

    申请号:US10509898

    申请日:2003-03-31

    摘要: A technique is provided for protecting an interlayer insulating film formed of an organic low dielectric constant material from any damage applied in a semiconductor process, and for attaining the decrease leak current in the interlayer insulating film, resulting in the improvement of reliability of a semiconductor device. The semiconductor device according to the present invention has an organic insulating films (5, 26, 28) having openings. The organic insulating films (5, 26, 28) have modified portions (5a, 26a, 28a) facing the openings. The modified portions (5a, 26a, 28a) contains fluorine atoms and nitrogen atoms. The concentration of the fluorine atoms in the modified portions (5a, 26a, 28a) is lower than the concentration of the nitrogen atoms. The above-mentioned modified layers (5a, 26a, 28a) protect the semiconductor device from the damage applied in the semiconductor process, while suppressing the corrosion of the conductors embedded in the openings.

    摘要翻译: 提供了一种用于保护由有机低介电常数材料形成的层间绝缘膜的技术,用于在半导体工艺中施加的任何损坏,并且为了获得在层间绝缘膜中的减小的漏电流,从而提高半导体器件的可靠性 。 根据本发明的半导体器件具有具有开口的有机绝缘膜(5,26,28)。 有机绝缘膜(5,26,28)具有面向开口的变形部分(5a,26a,28a)。 改性部分(5a,26a,28a)含有氟原子和氮原子。 改性部分(5a,26a,28a)中氟原子的浓度低于氮原子的浓度。 上述改性层(5a,26a,28a)保护半导体器件免受在半导体工艺中的损坏,同时抑制嵌入在开口中的导体的腐蚀。

    Semiconductor device
    14.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US08816312B2

    公开(公告)日:2014-08-26

    申请号:US13824098

    申请日:2011-09-20

    IPC分类号: H01L29/00

    摘要: A semiconductor device according to the present invention includes: an unit element which includes a first switch and a second switch, wherein each of the first switch and the second switch includes an electrical resistance changing layer whose state of electrical resistance is changed according to a polarity of an applied voltage, and each of the first switch and the second switch has two electrodes, and wherein one electrode of the first switch and one electrode of the second switch are connected each other to form a common node, and the other electrode of the first switch forms a first node, and the other electrode of the second switch forms a second node; a first wiring which is connected with the first node and forms a signal transmission line; and a second wiring which is connected with the second node and is connected with the first wiring through the unit element.

    摘要翻译: 根据本发明的半导体器件包括:单元,其包括第一开关和第二开关,其中第一开关和第二开关中的每一个包括电阻变化层,其电阻状态根据极性而改变 并且第一开关和第二开关中的每一个具有两个电极,并且其中第一开关的一个电极和第二开关的一个电极彼此连接以形成公共节点,而另一个电极 第一开关构成第一节点,第二开关的另一个电极形成第二节点; 第一布线,与第一节点连接并形成信号传输线; 以及与第二节点连接并且通过单元元件与第一布线连接的第二布线。

    Semiconductor device and method for manufacturing same
    16.
    发明申请
    Semiconductor device and method for manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号:US20110266678A1

    公开(公告)日:2011-11-03

    申请号:US13067960

    申请日:2011-07-11

    IPC分类号: H01L23/485 H01L21/768

    摘要: A semiconductor device includes a semiconductor substrate, an insulating film formed above the semiconductor substrate, and a multilayered wiring formed in a prescribed area within the insulating film. The multilayered wiring includes a dual damascene wiring positioned on at least one layer of the multilayered wiring. The dual damascene wiring includes an alloy having copper as a principal component. A concentration of at least one metallic element contained as an added component of the alloy in a via connected to the dual damascene wiring is 10% or more higher in a via connected to a wiring whose width exceeds by five or more times a diameter of the via than that in another via connected to another wiring of a smallest width in a same upper wiring layer of the multilayered wiring.

    摘要翻译: 半导体器件包括半导体衬底,形成在半导体衬底上的绝缘膜,以及形成在绝缘膜内的规定区域中的多层布线。 多层布线包括位于多层布线的至少一层上的双镶嵌布线。 双镶嵌线包括以铜为主要成分的合金。 在连接到双镶嵌布线的通孔中作为合金的添加成分含有的至少一种金属元素的浓度在连接到宽度超过五倍或更多倍的布线的通孔中为10%以上 通过连接到多层布线的同一上布线层中的最小宽度的另一布线的通孔。

    Multilayered wiring structure, and method for manufacturing multilayered wiring
    18.
    发明授权
    Multilayered wiring structure, and method for manufacturing multilayered wiring 有权
    多层布线结构以及多层布线的制造方法

    公开(公告)号:US07999391B2

    公开(公告)日:2011-08-16

    申请号:US12278339

    申请日:2007-02-06

    IPC分类号: H01L29/40

    摘要: Provided is a wiring of the Damascene structure for preventing the TDDB withstand voltage degradation and for keeping the planarity to prevent the degradation of a focus margin. A trench wiring (213) is formed in an interlayer insulating film, which is composed of a silicon carbide-nitride film (205), a SiOCH film (206) and a silicon oxide film (207) [(e)]. The silicon oxide film (207) is etched at a portion adjacent to the wiring of a polished surface by dry etching or wet etching [(f)]. A silicon carbide-nitride film (SiCN) (214) is formed as a Cu cap film [(g)]. An interlayer insulating film is further formed thereon to form a conductive plug, a trench wiring and so on.

    摘要翻译: 提供了一种用于防止TDDB耐电压劣化并保持平面性以防止聚焦余量劣化的镶嵌结构的布线。 沟槽布线(213)形成在由碳化硅 - 氮化物膜(SiO 2),SiOCH膜(206)和氧化硅膜(207)[(e)]组成的层间绝缘膜中。 氧化硅膜(207)通过干蚀刻或湿蚀刻(f)]在与抛光表面的布线相邻的部分被蚀刻。 形成碳化硅 - 氮化物膜(SiCN)(214)作为Cu帽膜[(g)]。 还在其上形成层间绝缘膜以形成导电插塞,沟槽布线等。

    Wiring structure and method for manufacturing the same
    20.
    发明申请
    Wiring structure and method for manufacturing the same 有权
    接线结构及其制造方法

    公开(公告)号:US20070013069A1

    公开(公告)日:2007-01-18

    申请号:US10558367

    申请日:2004-05-28

    IPC分类号: H01L23/52 H01L23/48 H01L29/40

    摘要: A multilayer wiring structure for connecting a semiconductor device is disclosed which is obtained by forming metal wirings on a substrate in which the semiconductor device is formed. The wiring structure free from such conventional problems that insulation between wirings next to each other is damaged or insulation resistance between wirings next to each other is deteriorated by generation of leakage current when fine metal wirings are formed in a porous insulating film. A method for producing such a wiring structure is also disclosed. In the metal wiring structure on the substrate in which the semiconductor device is formed, a insulating barrier layer (413) containing an organic matter is formed between an interlayer insulating film and a metal wiring. This insulating barrier layer reduces leakage current between wirings next to each other, thereby improving insulation reliability.

    摘要翻译: 公开了一种用于连接半导体器件的多层布线结构,其通过在其中形成半导体器件的基板上形成金属布线而获得。 布线结构没有这样的常规问题,即在多孔绝缘膜中形成细金属布线时,通过产生漏电流而使彼此相邻的布线之间的绝缘损坏或彼此相邻的布线之间的绝缘电阻恶化。 还公开了一种用于制造这种布线结构的方法。 在形成了半导体器件的基板上的金属布线结构中,在层间绝缘膜和金属布线之间形成含有有机物质的绝缘阻挡层(413)。 该绝缘阻挡层减少彼此相邻的布线之间的漏电流,从而提高绝缘可靠性。