Local voltage control for isolated transistor arrays
    11.
    发明授权
    Local voltage control for isolated transistor arrays 有权
    隔离晶体管阵列的本地电压控制

    公开(公告)号:US09244478B2

    公开(公告)日:2016-01-26

    申请号:US14455346

    申请日:2014-08-08

    CPC classification number: G05F3/205 G05F3/16

    Abstract: Self-biasing transistor switching circuitry includes a main transistor, a biasing transistor, a first capacitor, and a second capacitor. The body of the main transistor is isolated from the gate, the drain, and the source of the main transistor by an insulating layer. The first capacitor is coupled between the source and the gate of the main transistor. The second capacitor is coupled between the source and the body of the main transistor. The body and the drain of the main transistor are coupled together. The gate and the drain of the biasing transistor are coupled to the gate of the main transistor. The drain of the biasing transistor is coupled to the drain of the main transistor. The self-biasing transistor switching circuitry is adapted to receive an oscillating signal at the drain of the main transistor, and use the oscillating signal to appropriately bias the main transistor.

    Abstract translation: 自偏压晶体管开关电路包括主晶体管,偏置晶体管,第一电容器和第二电容器。 主晶体管的主体通过绝缘层与主晶体管的栅极,漏极和源极隔离。 第一电容器耦合在主晶体管的源极和栅极之间。 第二电容器耦合在主晶体管的源极和主体之间。 主晶体管的主体和漏极耦合在一起。 偏置晶体管的栅极和漏极耦合到主晶体管的栅极。 偏置晶体管的漏极耦合到主晶体管的漏极。 自偏置晶体管开关电路适于在主晶体管的漏极处接收振荡信号,并且使用振荡信号来适当地偏置主晶体管。

    Technique to reduce the third harmonic of an on-state RF switch
    12.
    发明授权
    Technique to reduce the third harmonic of an on-state RF switch 有权
    降低导通状态RF开关三次谐波的技术

    公开(公告)号:US09236957B2

    公开(公告)日:2016-01-12

    申请号:US14271921

    申请日:2014-05-07

    CPC classification number: H04B15/02

    Abstract: RF switching circuitry includes an RF switch coupled between an input node and an output node. Distortion compensation circuitry is coupled in parallel with the RF switch between the input node and the output node. The RF switch is configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal. The distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node. Boosting a portion of the RF signal that is being compressed by the RF switch allows a signal passing through the RF switch to remain substantially linear, thereby improving the performance of the RF switching circuitry.

    Abstract translation: RF切换电路包括耦合在输入节点和输出节点之间的RF开关。 失真补偿电路与输入节点和输出节点之间的RF开关并联耦合。 RF开关被配置为基于第一开关控制信号选择性地将RF信号从输入节点传递到输出节点。 失真补偿电路被配置为通过选择性地将电流注入到输入节点或输出节点之一时,通过RF信号的幅度高于预定阈值来升高被RF开关压缩的RF信号的一部分。 升高由RF开关压缩的RF信号的一部分允许通过RF开关的信号保持基本上线性,从而提高RF开关电路的性能。

    Tunable filter front end architecture for non-contiguous carrier aggregation
    13.
    发明授权
    Tunable filter front end architecture for non-contiguous carrier aggregation 有权
    可调滤波器前端架构,用于不连续的载波聚合

    公开(公告)号:US09225382B2

    公开(公告)日:2015-12-29

    申请号:US14282393

    申请日:2014-05-20

    Inventor: Nadim Khlat

    CPC classification number: H04B1/44 H04B1/0064 H04L5/001

    Abstract: Front end circuitry for a mobile terminal includes separate receive paths and filtering elements for different portions of each operating band. Accordingly, the filtering elements for each receive path can be designed with a smaller pass-band, thereby reducing the complexity of filtering circuitry in the front end circuitry and improving the efficiency thereof.

    Abstract translation: 用于移动终端的前端电路包括用于每个工作频带的不同部分的单独的接收路径和滤波元件。 因此,用于每个接收路径的滤波元件可以设计成具有较小的通带,从而降低前端电路中的滤波电路的复杂性并提高其效率。

    Composite sacrificial structure for reliably creating a contact gap in a MEMS switch
    14.
    发明授权
    Composite sacrificial structure for reliably creating a contact gap in a MEMS switch 有权
    用于在MEMS开关中可靠地产生接触间隙的复合牺牲结构

    公开(公告)号:US09221677B2

    公开(公告)日:2015-12-29

    申请号:US12973105

    申请日:2010-12-20

    Applicant: Sangchae Kim

    Inventor: Sangchae Kim

    CPC classification number: B81C1/00626 B81B2201/014 H01H1/0036 H01H59/0009

    Abstract: The present Disclosure provides for fabrication devices and methods for manufacturing a micro-electromechanical system (MEMS) switch on a substrate. The MEMS fabrication device may have a first and second sacrificial layer that form the mold of an actuation member. The actuation member is formed over the first and second sacrificial layers to manufacture a MEMS switch from the MEMS fabrication device.

    Abstract translation: 本公开提供了用于在基板上制造微机电系统(MEMS)开关的制造装置和方法。 MEMS制造装置可以具有形成致动构件的模具的第一和第二牺牲层。 致动构件形成在第一和第二牺牲层上,以从MEMS制造装置制造MEMS开关。

    SPAC series programmable array of capacitors
    15.
    发明授权
    SPAC series programmable array of capacitors 有权
    SPAC系列可编程阵列电容器

    公开(公告)号:US09214922B2

    公开(公告)日:2015-12-15

    申请号:US13935842

    申请日:2013-07-05

    CPC classification number: H03J5/246 H01G4/38 H01G4/40 H01G7/00 H03J2200/10

    Abstract: A tunable series resonant circuit includes a voltage source, a source impedance, a variable capacitor, a series inductor, and a load impedance. The variable capacitor includes a sPAC (series programmable array of capacitors) having desirable characteristics for a tunable series resonant circuit. The sPAC may be a binary weighted sPAC, a thermometer coded sPAC, or some other sPAC.

    Abstract translation: 可调谐串联谐振电路包括电压源,源阻抗,可变电容器,串联电感器和负载阻抗。 可变电容器包括具有用于可调谐串联谐振电路的期望特性的sPAC(串联可编程电容器阵列)。 sPAC可以是二进制加权sPAC,温度计编码sPAC或其他一些sPAC。

    Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same
    16.
    发明授权
    Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same 有权
    图案化硅胶(SOP)技术及其制造方法

    公开(公告)号:US09214337B2

    公开(公告)日:2015-12-15

    申请号:US14261029

    申请日:2014-04-24

    Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

    Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括附接到晶片把手的半导体堆叠结构,其具有至少一个孔,其延伸穿过晶片把手到达半导体堆叠结构的暴露部分。 导热和电阻聚合物基本上填充至少一个孔并接触半导体堆叠结构的暴露部分。 用于制造半导体器件的一种方法包括在晶片手柄中形成图案化孔以暴露半导体堆叠结构的一部分。 图案化的孔可以或可以不与构成半导体堆叠结构的RF电路的部分对准。 接下来的步骤包括使半导体堆叠结构的暴露部分与聚合物接触,并且用聚合物基本上填充图案化的孔,其中聚合物是导热的并具有电阻性。

    Gallium nitride (GaN) device with leakage current-based over-voltage protection
    17.
    发明授权
    Gallium nitride (GaN) device with leakage current-based over-voltage protection 有权
    具有漏电流的过电压保护的氮化镓(GaN)器件

    公开(公告)号:US09202874B2

    公开(公告)日:2015-12-01

    申请号:US13957698

    申请日:2013-08-02

    Abstract: A gallium nitride (GaN) device with leakage current-based over-voltage protection is disclosed. The GaN device includes a drain and a source disposed on a semiconductor substrate. The GaN device also includes a first channel region within the semiconductor substrate and between the drain and the source. The GaN device further includes a second channel region within the semiconductor substrate and between the drain and the source. The second channel region has an enhanced drain induced barrier lowering (DIBL) that is greater than the DIBL of the first channel region. As a result, a drain voltage will be safely clamped below a destructive breakdown voltage once a substantial drain current begins to flow through the second channel region.

    Abstract translation: 公开了一种具有基于漏电流的过电压保护的氮化镓(GaN)器件。 GaN器件包括设置在半导体衬底上的漏极和源极。 GaN器件还包括半导体衬底内的第一沟道区域和漏极与源极之间。 GaN器件还包括半导体衬底内的第二沟道区域和漏极与源极之间。 第二通道区域具有大于第一通道区域的DIBL的增强的漏极引发屏障降低(DIBL)。 结果,一旦大量漏极电流开始流过第二沟道区域,漏极电压将被安全地夹在破坏性击穿电压之下。

    Envelope tracking power supply voltage dynamic range reduction
    19.
    发明授权
    Envelope tracking power supply voltage dynamic range reduction 有权
    信封跟踪电源电压动态范围缩小

    公开(公告)号:US09197162B2

    公开(公告)日:2015-11-24

    申请号:US14212199

    申请日:2014-03-14

    CPC classification number: H03F1/02 H03F1/0222 H03F3/189 H03F3/20

    Abstract: A radio frequency (RF) system includes an RF power amplifier (PA), which uses an envelope tracking power supply voltage to provide an RF transmit signal, which has an RF envelope; and further includes an envelope tracking power supply, which provides the envelope tracking power supply voltage based on a setpoint. RF transceiver circuitry, which includes envelope control circuitry and an RF modulator is disclosed. The envelope control circuitry provides the setpoint, such that the envelope tracking power supply voltage is clipped to form clipped regions and substantially tracks the RF envelope between the clipped regions, wherein a dynamic range of the envelope tracking power supply voltage is limited. The RF modulator provides an RF input signal to the RF PA, which receives and amplifies the RF input signal to provide the RF transmit signal.

    Abstract translation: 射频(RF)系统包括RF功率放大器(PA),其使用包络跟踪电源电压来提供具有RF包络的RF发射信号; 并且还包括一个包络跟踪电源,它根据设定点提供包络跟踪电源电压。 公开了包括封装控制电路和RF调制器的RF收发器电路。 包络控制电路提供设定点,使得包络跟踪电源电压被限幅以形成限幅区域,并且基本上跟踪限幅区域之间的RF包络,其中包络跟踪电源电压的动态范围受到限制。 RF调制器向RF PA提供RF输入信号,RF PA接收并放大RF输入信号以提供RF发射信号。

    High Q factor inductor structure
    20.
    发明授权
    High Q factor inductor structure 有权
    高Q因子电感结构

    公开(公告)号:US09196406B2

    公开(公告)日:2015-11-24

    申请号:US14099007

    申请日:2013-12-06

    CPC classification number: H01F5/003 H01F17/0013 H01F2017/002 H01F2017/0073

    Abstract: The present disclosure provides a vertical inductor structure in which the magnetic field is closed such that the magnetic field of the vertical inductor structure is cancelled in the design direction outside the vertical inductor structure, yielding a small, or substantially zero, coupling factor of the vertical inductor structure. In one embodiment, several vertical inductor structures of the present disclosure can be placed in close proximity to create small resonant circuits and filter chains.

    Abstract translation: 本公开提供了垂直电感器结构,其中磁场被闭合,使得垂直电感器结构的磁场在垂直电感器结构外部的设计方向上消除,产生垂直的垂直电感器结构的小的或基本为零的耦合因子 电感结构。 在一个实施例中,本公开的几个垂直电感器结构可以紧邻地设置,以产生小的谐振电路和滤波器链。

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