公开(公告)号：US20180090086A1

公开(公告)日：2018-03-29

申请号：US15824343

申请日：2017-11-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: G09G3/36 ,  H01L29/786 ,  G02F1/1335 ,  H01L29/66 ,  H01L29/45 ,  H01L29/423 ,  H01L29/24 ,  H01L27/12 ,  H01L21/477 ,  H01L21/467 ,  H01L21/02 ,  G02F1/1343 ,  G02F1/1368

Abstract: In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

公开(公告)号：US20180088644A1

公开(公告)日：2018-03-29

申请号：US15794033

申请日：2017-10-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Shunpei YAMAZAKI

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/3287 ,  Y02D10/171

Abstract: To individually control supply of the power supply voltage to circuits, a semiconductor device includes a CPU, a memory that reads and writes data used in arithmetic operation of the CPU, a signal processing circuit that generates an output signal by converting a data signal generated by the arithmetic operation of the CPU, a first power supply control switch that controls supply of the power supply voltage to the CPU, a second power supply control switch that controls supply of the power supply voltage to the memory, a third power supply control switch that controls supply of the power supply voltage to the signal processing circuit, and a controller that at least has a function of controlling the first to third power supply control switches individually in accordance with an input signal and instruction signals input from the CPU and the signal processing circuit.

公开(公告)号：US20180026153A1

公开(公告)日：2018-01-25

申请号：US15672452

申请日：2017-08-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Mitsuaki OSAME ,  Aya ANZAI ,  Jun KOYAMA ,  Makoto UDAGAWA ,  Masahiko HAYAKAWA ,  Shunpei YAMAZAKI

IPC: H01L33/08 ,  G09G3/3233

CPC classification number: H01L33/08 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0254 ,  G09G2320/043 ,  H01L27/3211 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A-light-emitting device which realizes a high aperture ratio and in which the quality of image is little affected by the variation in the characteristics of TFTs. The channel length of the driving TFTs is selected to be very larger than the channel width of the driving TFTs to improve current characteristics in the saturated region, and a high VGS is applied to the driving TFTs to obtain a desired drain current. Therefore, the drain currents of the driving TFTs are little affected by the variation in the threshold voltage. In laying out the pixels, further, wiring is arranged under the partitioning wall and the driving This are arranged under the wiring in order to avoid a decrease in the aperture ratio despite of an increase in the size of the driving TFT.

公开(公告)号：US20170317215A1

公开(公告)日：2017-11-02

申请号：US15651251

申请日：2017-07-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Jun KOYAMA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/24 ,  H01L27/12 ,  H01L21/02

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are foamed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.

公开(公告)号：US20170271338A1

公开(公告)日：2017-09-21

申请号：US15615873

申请日：2017-06-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC: H01L27/105 ,  G11C11/405

CPC classification number: H01L27/1052 ,  G11C11/405 ,  G11C16/0433 ,  G11C2211/4016 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/11803 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/16 ,  H01L29/24 ,  H01L29/247 ,  H01L29/7833 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

公开(公告)号：US20170213832A1

公开(公告)日：2017-07-27

申请号：US15427088

申请日：2017-02-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC: H01L27/105 ,  G11C7/12 ,  G11C5/06 ,  H01L27/12

CPC classification number: H01L27/1052 ,  G11C5/06 ,  G11C7/12 ,  G11C11/404 ,  G11C11/405 ,  G11C11/565 ,  G11C16/0408 ,  G11C16/10 ,  G11C2211/4016 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/263 ,  H01L29/7869

Abstract: Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor.

公开(公告)号：US20170192272A1

公开(公告)日：2017-07-06

申请号：US15464572

申请日：2017-03-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshikazu KONDO ,  Jun KOYAMA ,  Shunpei YAMAZAKI

IPC: G02F1/1368 ,  G02F1/1333 ,  G09G3/36 ,  G02F1/1362

Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.

公开(公告)号：US20170092776A1

公开(公告)日：2017-03-30

申请号：US15372493

申请日：2016-12-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/24 ,  G06K19/077 ,  H01L29/66 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088

CPC classification number: H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel fog nation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20170084638A1

公开(公告)日：2017-03-23

申请号：US15370034

申请日：2016-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/023 ,  H01L27/124 ,  H01L27/1285 ,  H01L29/045 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.

公开(公告)号：US20170059909A1

公开(公告)日：2017-03-02

申请号：US15342410

申请日：2016-11-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Shunpei YAMAZAKI

IPC: G02F1/1368 ,  G02F1/1343

CPC classification number: G02F1/1368 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133784 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/13454 ,  G02F1/1362 ,  G02F1/136286 ,  G02F1/137 ,  G02F2001/133302 ,  G02F2001/133357 ,  G02F2001/133388 ,  G02F2001/133742 ,  G02F2001/13793 ,  G02F2201/121 ,  G02F2201/123

Abstract: When a pixel portion and a driver circuit are formed over one substrate and a counter electrode is formed over an entire surface of a counter substrate, the driver circuit may be adversely affected by an optimized voltage of the counter electrode. A semiconductor device according to the present invention has a structure in which: a liquid crystal layer is provided between a pair of substrates; one of the substrates is provided with a pixel electrode and a driver circuit; the other of the substrates is a counter substrate which is provided with two counter electrode layers in different potentials; and one of the counter electrode layers overlaps with the pixel electrode with the liquid crystal layer therebetween and the other of the counter electrode layers overlaps with the driver circuit with the liquid crystal layer therebetween. An oxide semiconductor layer is used for the driver circuit.

Abstract translation: 当像素部分和驱动电路形成在一个衬底上并且相对电极形成在对向衬底的整个表面上时，驱动电路可能受到对电极的优化电压的不利影响。 根据本发明的半导体器件具有以下结构：在一对基板之间设置液晶层; 其中一个基板设置有像素电极和驱动电路; 另一个基板是相对基板，其具有不同电位的两个对电极层; 相对电极层中的一个与像素电极重叠，液晶层在其间，另一个对电极层与驱动电路重叠，液晶层在其间。 氧化物半导体层用于驱动电路。