公开(公告)号：US08383459B2

公开(公告)日：2013-02-26

申请号：US12145364

申请日：2008-06-24

Applicant: Lakshmi Supriya ,  Jessica Weninger ,  Leonel Arana ,  Lateef Mustapha

Inventor： Lakshmi Supriya ,  Jessica Weninger ,  Leonel Arana ,  Lateef Mustapha

IPC: H01L21/00

CPC classification number: F28F7/00 ,  H01L23/3735 ,  H01L23/3737 ,  H01L23/433 ,  H01L24/30 ,  H01L24/33 ,  H01L2224/73253 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01033 ,  H01L2924/01056 ,  Y10T156/10 ,  Y10T428/31663

Abstract: Methods are disclosed to process a thermal interface material to achieve easy pick and placement of the thermal interface material without lowering thermal performance of a completed semiconductor package. One method involves applying a non-adhesive layer on one or more surfaces of the thermal interface material, interfacing the thermal interface material with one or more components to interface the non-adhesive layer therebetween, and applying heat to alter the non-adhesive layer to increase thermal contact between the thermal interface material and the interfacing component(s).

Abstract translation: 公开了处理热界面材料以实现热界面材料的容易拾取和放置而不降低完成的半导体封装的热性能的方法。 一种方法包括在热界面材料的一个或多个表面上施加非粘合剂层，将热界面材料与一种或多种组分接合，使其间的非粘合剂层相互接触，并施加热量以将非粘合剂层改变为 增加热界面材料和界面部件之间的热接触。

公开(公告)号：US08173259B2

公开(公告)日：2012-05-08

申请号：US11863122

申请日：2007-09-27

Applicant: Lakshmi Supriya ,  Linda A. Shekhawat

Inventor： Lakshmi Supriya ,  Linda A. Shekhawat

IPC: B32B5/66

CPC classification number: H01L23/373 ,  B05D1/002 ,  B05D2202/45 ,  B05D2451/00 ,  H01L23/3735 ,  H01L2924/0002 ,  Y10T428/25 ,  Y10T428/254 ,  Y10T428/2991 ,  Y10T428/2998 ,  B05D2401/32 ,  H01L2924/00

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of functionalized nanaparticles on a substrate by immersing the substrate in at least one of a solvent and a polymer matrix, wherein at least one of the solvent and the polymer matrix comprises a plurality of functionalized nanoparticles; and forming a second layer of functionalized nanoparticles on the first layer of functionalized particles, wherein there is a gradient in a property between the first layer and the second layer.

Abstract translation: 描述形成微电子器件的方法和相关结构。 这些方法可以包括通过将基底浸入溶剂和聚合物基质中的至少一种来在基底上形成第一层官能化纳米颗粒，其中至少一种溶剂和聚合物基质包含多个官能化纳米颗粒; 以及在所述第一功能化颗粒层上形成第二层官能化纳米颗粒，其中在所述第一层和所述第二层之间具有特性梯度。

公开(公告)号：US08017498B2

公开(公告)日：2011-09-13

申请号：US12284531

申请日：2008-09-22

Applicant: Lakshmi Supriya ,  Gloria Alejandra Camacho-Bragado

Inventor： Lakshmi Supriya ,  Gloria Alejandra Camacho-Bragado

IPC: H01L21/30

CPC classification number: H01L24/81 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/53276 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/11003 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014

Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.

Abstract translation: 多管芯结构包括第一管芯（110），第二管芯（120），碳纳米管（130），其具有与第一管芯物理接触的第一末端（131）并具有物理接触的第二末端（132） 与第二管芯相连，以及与碳纳米管的第一端物理接触并与第一管芯物理接触的导电材料（240）。 形成第一管芯和第二管芯之间的连接可以包括提供连接结构（400,500,600,900），其中导电材料邻近于碳纳米管，将连接结构放置在第一管芯附近，并且 第二管芯，并将第一管芯和第二管芯结合到连接结构。

公开(公告)号：US20090273914A1

公开(公告)日：2009-11-05

申请号：US12151063

申请日：2008-05-01

Applicant: Lakshmi Supriya ,  Anna M. Prakash ,  Tommy L. Ashton

Inventor： Lakshmi Supriya ,  Anna M. Prakash ,  Tommy L. Ashton

IPC: H01L21/768 ,  H01L21/50 ,  H05K7/00

CPC classification number: H05K3/3489 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/731 ,  H01L2224/73104 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/9211 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K2203/0113 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/05599

Abstract: Embodiments of an apparatus and methods of forming interconnect between a workpiece and substrate and its application to packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.

Abstract translation: 本文描述了在工件和基板之间形成互连的装置和方法的实施例及其在微电子器件的封装中的应用。 可以描述和要求保护其他实施例。

公开(公告)号：US07611985B2

公开(公告)日：2009-11-03

申请号：US11533653

申请日：2006-09-20

Applicant: James C. Matayabas, Jr. ,  Lakshmi Supriya

Inventor： James C. Matayabas, Jr. ,  Lakshmi Supriya

IPC: H01L21/4763

CPC classification number: H01L21/76897 ,  H01L21/486 ,  H01L21/76802 ,  H05K3/0017 ,  H05K2203/1173

Abstract: Methods and systems for forming holes in a substrate using dewetting coating are described herein.

Abstract translation: 本文描述了使用去湿涂层在基材中形成孔的方法和系统。

公开(公告)号：US20080311738A1

公开(公告)日：2008-12-18

申请号：US11764247

申请日：2007-06-18

Applicant: Lakshmi Supriya ,  Daewoong Suh

Inventor： Lakshmi Supriya ,  Daewoong Suh

IPC: H01L21/4763

CPC classification number: H05K3/321 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/292 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/102 ,  H05K2203/1131 ,  H05K2203/122 ,  Y10T428/12111 ,  Y10T428/24917 ,  Y10T428/25 ,  Y10T428/256 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

Abstract: A method of forming an interconnect joint includes providing a first metal layer (210, 310), providing a film (220, 320) including metal particles (221, 321) and organic molecules (222, 322), placing the film over the first metal layer, placing a second metal layer (230, 330) over the film, and sintering the metal particles such that the organic molecules degrade and the first metal layer and the second metal layer are joined together.

Abstract translation: 形成互连接头的方法包括提供第一金属层（210,310），提供包括金属颗粒（221,321）和有机分子（222,322）的膜（220,320），将膜放置在第一 金属层，在膜上放置第二金属层（230,330），并烧结金属颗粒使得有机分子降解，并且第一金属层和第二金属层接合在一起。

公开(公告)号：US20080160177A1

公开(公告)日：2008-07-03

申请号：US11618528

申请日：2006-12-29

Applicant: J. C. Mataybas ,  Lakshmi Supriya ,  Omar Bchir

Inventor： J. C. Mataybas ,  Lakshmi Supriya ,  Omar Bchir

IPC: B05D5/12

CPC classification number: H05K3/182 ,  C23C18/1608 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/30 ,  C23C18/31 ,  C23C18/38 ,  C23C18/52 ,  H05K3/046 ,  H05K3/4661 ,  H05K2203/0108 ,  H05K2203/0522

Abstract: Methods for forming traces/lines and interconnects on substrates and devices and systems thereof of herein disclosed. In some embodiments, an activator layer is deposited on a surface of a substrate. Pick-up lithography using a pre-patterned lithographic stamp, ultraviolet lithography or like methods are used to selectively remove portions of the activator layer to form a pattern on the surface of the substrate. Electroless metal deposition is then applied to the surface of the substrate to form a metal pattern selectively on the remaining activator layer. Electroless plating can then be used to form traces/lines and interconnects in dimensions of less than 10 micrometers.

Abstract translation: 用于在本文公开的衬底及其器件及其系统上形成迹线/线和互连的方法。 在一些实施例中，激活剂层沉积在基底的表面上。 使用预先图案化的平版印刷，紫外光刻或类似方法的拾取光刻用于选择性地去除激活剂层的部分以在基底的表面上形成图案。 然后将无电金属沉积施加到衬底的表面上以在剩余的激活剂层上选择性地形成金属图案。 然后可以使用化学镀来形成尺寸小于10微米的迹线/线和互连。