公开(公告)号：US07075177B2

公开(公告)日：2006-07-11

申请号：US09912064

申请日：2001-07-25

申请人： Takahiro Oka ,  Makoto Terui

发明人： Takahiro Oka ,  Makoto Terui

IPC分类号： H01L23/02

CPC分类号： H01L24/06 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip package is formed by a first semiconductor chip and a second semiconductor chip, which have electrodes for wiring at surfaces thereof, being integrated and mounted in a state in which reverse surfaces thereof oppose one another. Therefore, two semiconductor chips can be freely combined and mounted regardless of chip sizes thereof, and lengths of wires can be shortened. Thus, a wire-bonding yield can be improved, and a semiconductor package having excellent electric characteristics can be obtained.

公开(公告)号：US07067357B2

公开(公告)日：2006-06-27

申请号：US10810600

申请日：2004-03-29

申请人： Makoto Terui ,  Takahiro Oka

发明人： Makoto Terui ,  Takahiro Oka

IPC分类号： H01L21/50

CPC分类号： H01L23/3107 ,  B29C45/14065 ,  B29C45/14311 ,  B29C45/14467 ,  B29C45/14655 ,  B29C45/34 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49548 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor chip provided with a plurality of electric terminals and a plurality of electrically conductive members electrically connected with the electric terminals. Connection terminals that are spherical in shape and made of solder are electrically connected with the electrically conductive members. A sealing member is used for sealing the semiconductor chip and the electrically conductive members, and for covering the connection terminals so as to allow a part thereof to be exposed. The electrically conductive members are provided with bonding promoters and are connected with the respective spherical connection terminals at the respective bonding promoters.

摘要翻译： 半导体封装包括设置有多个电端子的半导体芯片和与电端子电连接的多个导电构件。 形状为球形且由焊料制成的连接端子与导电构件电连接。 密封构件用于密封半导体芯片和导电构件，并且用于覆盖连接端子以允许其一部分露出。 导电构件设置有接合促进器，并且在相应的接合促进器处与各个球形连接端子连接。

公开(公告)号：US06948239B2

公开(公告)日：2005-09-27

申请号：US10317152

申请日：2002-12-12

申请人： Takahiro Oka

发明人： Takahiro Oka

IPC分类号： H01L23/28 ,  H01L21/56 ,  H01L23/12 ,  H01L23/31 ,  H01R43/00 ,  H05K13/00

CPC分类号： H01L23/3128 ,  H01L21/565 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/49121 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method for fabricating a semiconductor apparatus using a board frame. A wiring board region of the frame includes an island on which a semiconductor device is mounted. A marginal region of the frame surrounds the wiring board region. A frame region is located around the marginal region. A support region extends between the wiring board region and the frame region to connect the wiring board region and frame region together through the support region. The marginal region is removed from the board frame and then put back to its original position, while maintaining the wiring board region connected to the frame region through the support region. Then, the device is mounted onto the island. Next, transfer-molding is performed on the device using a die set that includes a gate through which a thermosetting resin is guided into a cavity. Then, the marginal region is removed completely from the board frame.

摘要翻译： 一种使用板框制造半导体装置的方法。 框架的布线板区域包括其上安装有半导体器件的岛。 框架的边缘区域围绕着布线板区域。 框架区域位于边缘区域周围。 支撑区域在布线板区域和框架区域之间延伸，以通过支撑区域将布线板区域和框架区域连接在一起。 边缘区域从板框架上移除，然后放回其原始位置，同时通过支撑区域将布线板区域连接到框架区域。 然后，该装置安装在岛上。 接下来，使用包括将热固性树脂引导到空腔中的浇口的模具在装置上进行传递模塑。 然后，边缘区域从板框架完全移除。

公开(公告)号：US06831354B2

公开(公告)日：2004-12-14

申请号：US10022268

申请日：2001-12-20

申请人： Makoto Terui ,  Takahiro Oka

发明人： Makoto Terui ,  Takahiro Oka

IPC分类号： H01L2302

CPC分类号： H01L23/3107 ,  B29C45/14065 ,  B29C45/14311 ,  B29C45/14467 ,  B29C45/14655 ,  B29C45/34 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49548 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor packgage includes a semiconductor chip provided with a plurality of electric terminals and a plurality of electrically conductive members electrically connected with the electric terminals. Connection terminals that are spherical in shape and made of solder are electrically connected with the electrically conductive members. A sealing member is used for sealing the semiconductor chip and the electrically conductive members, and for covering the connection terminals so as to allow a part thereof to be exposed. The electrically conductive members are provided with bonding promoters and are connected with the respective spherical connection terminals at the respective bonding promoters.

摘要翻译： 半导体封装包括设置有多个电端子的半导体芯片和与电端子电连接的多个导电构件。 形状为球形且由焊料制成的连接端子与导电构件电连接。 密封构件用于密封半导体芯片和导电构件，并且用于覆盖连接端子以允许其一部分露出。 导电构件设置有接合促进器，并且在相应的接合促进器处与各个球形连接端子连接。

公开(公告)号：US06777264B2

公开(公告)日：2004-08-17

申请号：US10201275

申请日：2002-07-24

申请人： Takahiro Oka

发明人： Takahiro Oka

IPC分类号： H01L2144

CPC分类号： H01L24/32 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/92 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/29007 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

摘要： A semiconductor device includes, a die pad having a top surface and a bottom surface, a first semiconductor chip having a top surface on which electrodes are formed and a bottom surface, and a second semiconductor chip having a top surface on which electrodes are formed, and a bottom surface, the second semiconductor chip being smaller than the first semiconductor chip, wherein the first chip top surface is fixed on the die pad bottom surface, the second chip bottom surface is fixed on the die pad top surface.

摘要翻译： 半导体器件包括具有顶表面和底表面的管芯焊盘，具有形成有电极的顶表面的第一半导体芯片和底表面，以及具有形成有电极的顶表面的第二半导体芯片， 以及底面，所述第二半导体芯片小于所述第一半导体芯片，其中所述第一芯片顶表面固定在所述芯片焊盘底面上，所述第二芯片底面固定在所述芯片顶部表面上。

公开(公告)号：US06472729B1

公开(公告)日：2002-10-29

申请号：US09188184

申请日：1998-11-10

申请人： Takahiro Oka

发明人： Takahiro Oka

IPC分类号： H01L23495

CPC分类号： H01L29/0657 ,  H01L23/49503 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/29339 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/83385 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01005 ,  H01L2924/01033

摘要： A semiconductor device chip packaged in the semiconductor device in accordance with this invention has one or more grooves engraved along the rear surface thereof to allow the grooves to receive one or more connection bars and a die pad or an island, if any, for the purpose to make the total thickness of the semiconductor device chip and the connection bar or bars and the die pad or the island, much thinner than the sum of the thickness of the semiconductor device chip and the thickness of the connection bar or bars and the die pad or the island, for the ultimate purpose to cause the finished or molded thickness of the semiconductor device in accordance with this invention to be as thin as 1.0 mm, resultantly allowing a semiconductor ingot having a diameter of 300 mm for producing a semiconductor device chip to be molded in the semiconductor device in accordance with this invention.

摘要翻译： 封装在根据本发明的半导体器件中的半导体器件芯片具有沿着其后表面雕刻的一个或多个凹槽，以允许沟槽接收一个或多个连接条和用于该目的的管芯焊盘或岛（如果有的话） 为了使半导体器件芯片和连接棒或棒以及芯片焊盘或岛的总厚度比半导体器件芯片的厚度和连接棒或棒的厚度和芯片焊盘的厚度薄得多 或岛，为了最终目的，使根据本发明的半导体器件的成品或模制厚度尽可能薄到1.0mm，从而允许直径为300mm的半导体锭用于制造半导体器件芯片 根据本发明模制在半导体器件中。

公开(公告)号：US6084300A

公开(公告)日：2000-07-04

申请号：US986396

申请日：1997-12-08

申请人： Takahiro Oka

发明人： Takahiro Oka

IPC分类号： H01L23/28 ,  H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L23/49575 ,  H01L23/3107 ,  H05K3/3426 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y02P70/613

摘要： A semiconductor device of the present invention is structured such that solder balls for packaging are fixed onto leads protruding from a package to obviate drawbacks inherent in the conventional lead frame type semiconductor device, wherein it is difficult to correspond to the layout of the increased number of pins due to an occurrence of flexure of the lead, and protrusions of the lead terminals from the package resin are disadvantageous for downsizing.

摘要翻译： 本发明的半导体器件被构造成使得用于封装的焊球被固定到从封装突出的引线上，以消除常规引线框架型半导体器件固有的缺陷，其中难以对应于增加数量的 由于引线的弯曲发生引脚以及引线端子从封装树脂的突起不利于小型化。

公开(公告)号：US4499247A

公开(公告)日：1985-02-12

申请号：US501893

申请日：1983-06-07

申请人： Hiromasa Chiba ,  Kenjiro Obama ,  Shunji Kawazoe ,  Takahiro Oka ,  Akihiro Satoh

发明人： Hiromasa Chiba ,  Kenjiro Obama ,  Shunji Kawazoe ,  Takahiro Oka ,  Akihiro Satoh

IPC分类号： C08F2/00 ,  C08F2/04 ,  C08F4/00 ,  C08F4/60 ,  C08F4/64 ,  C08F8/00 ,  C08F10/00 ,  C08F10/06 ,  C08F110/06

CPC分类号： C08F10/06 ,  Y10S526/905

摘要： A superior high-rigidity and high-melt-viscoelasticity polypropylene for sheets to be post-processed and for blow molding is provided which polypropylene is produced by subjecting propylene to a multi-stage polymerization into polymer portions of two sections in the presence of a specified Ziegler Natta catalyst, the relationship between the intrinsic viscosities of the polymer portions of the respective sections being regulated within a specified range and also the amount ratio of the polymer portions of the respective sections being regulated.

摘要翻译： 提供了用于后处理和吹塑的片材的优异的高刚性和高熔点粘弹性聚丙烯，其通过在规定的存在下将丙烯进行多段聚合成两段聚合物部分来制备聚丙烯 齐格勒纳塔催化剂，将各部分的聚合物部分的特性粘度之间的关系调节在规定范围内，并且调节各部分的聚合物部分的量比。

公开(公告)号：US20100171914A1

公开(公告)日：2010-07-08

申请号：US12676388

申请日：2008-07-08

申请人： Katsuhiko Morishita ,  Takahiro Oka ,  Takehiko Sakai

发明人： Katsuhiko Morishita ,  Takahiro Oka ,  Takehiko Sakai

IPC分类号： G02F1/13363

CPC分类号： G02B5/3083 ,  G02F1/133634

摘要： A composite retardation plate for use in a Twisted Nematic liquid crystal display device, at least includes: a first retardation film; and a second retardation film stacked on the first retardation film, the first retardation film being such that the first retardation film has a refractive index anisotropy which varies in thickness of the first retardation film so as to compensate for sequential variations in refractive index anisotropy of a liquid crystal layer included in the Twisted Nematic liquid crystal display device, the sequential variations being caused by a region which is approximately regarded as a region in which liquid crystal molecules hybridly orient during voltage application, and the second retardation film having a refractive index anisotropy for compensating for a residual refractive index anisotropy which remains after the compensation performed by the first retardation film. This provides a composite retardation plate which is capable of highly accurately compensating for a refractive index anisotropy which may cause a decrease in contrast of a TN liquid crystal display device due to a viewing angle.

摘要翻译： 一种用于扭转向列型液晶显示装置的复合延迟板，至少包括：第一延迟膜; 以及叠层在第一延迟膜上的第二延迟膜，第一延迟膜使得第一延迟膜具有在第一延迟膜的厚度上变化的折射率各向异性，以便补偿第一延迟膜的折射率各向异性的顺序变化 包含在扭转向列型液晶显示装置中的液晶层，顺序变化是由近似被认为是在施加电压期间液晶分子杂化取向的区域的区域引起的，第二延迟膜具有折射率各向异性 补偿由第一延迟膜执行的补偿之后残留的残余折射率各向异性。 这提供了一种复合延迟板，其能够高度准确地补偿由于视角而导致TN液晶显示装置的对比度降低的折射率各向异性。

公开(公告)号：US20100110318A1

公开(公告)日：2010-05-06

申请号：US12594138

申请日：2007-12-20

申请人： Katsuya Ogawa ,  Kazuyoshi Fujioka ,  Tomoo Furukawa ,  Masaaki Saitoh ,  Koki Hongo ,  Akihiro Nanmatsu ,  Kazuyuki Aburazaki ,  Takahiro Oka ,  Takayuki Natsume

发明人： Katsuya Ogawa ,  Kazuyoshi Fujioka ,  Tomoo Furukawa ,  Masaaki Saitoh ,  Koki Hongo ,  Akihiro Nanmatsu ,  Kazuyuki Aburazaki ,  Takahiro Oka ,  Takayuki Natsume

IPC分类号： G02F1/1335 ,  G02F1/133

CPC分类号： G02F1/133555 ,  G02F1/133371 ,  G02F1/133707 ,  G02F1/1393

摘要： The present invention provides a semi-transmissive or reflective liquid crystal display device in which gray scale inversion is suppressed by appropriately adjusting its voltage-reflection luminance characteristics. The liquid crystal display device of the present invention is a liquid crystal display device including: a pair of substrates; and a liquid crystal layer interposed between the pair of substrates, wherein the liquid crystal display device includes a transmission region and a reflection region, the reflection region includes a first section and a second section, a thickness of the liquid crystal layer in the first section is larger than half of but equal to or smaller than a thickness of the liquid crystal layer in the transmission region, and a thickness of the liquid crystal layer in the second section is larger than the thickness of the liquid crystal layer in the transmission region.

摘要翻译： 本发明提供了通过适当调整其电压反射亮度特性来抑制灰度反转的半透射或反射型液晶显示装置。 本发明的液晶显示装置是一种液晶显示装置，包括：一对基板; 以及插入在所述一对基板之间的液晶层，其中所述液晶显示装置包括透射区域和反射区域，所述反射区域包括第一部分和第二部分，所述第一部分中的液晶层的厚度 大于透射区域的液晶层的厚度的一半以下，第二部分中的液晶层的厚度大于透射区域中的液晶层的厚度。