LENS RECEPTACLES
    23.
    发明申请
    LENS RECEPTACLES 有权
    镜头接收器

    公开(公告)号:US20160047996A1

    公开(公告)日:2016-02-18

    申请号:US14831499

    申请日:2015-08-20

    Abstract: This disclosure generally relates to high-speed fiber optic networks that use light signals to transmit data over a network. The disclosed subject matter includes devices and methods relating to lens receptacles and/or optoelectronic subassemblies. In some aspects, the disclosed devices and methods relate to a lens receptacle including a receptacle body extending between a receptacle top and a receptacle bottom, the receptacle body including: a port body defining a receptacle port with a port opening at the receptacle top; a receptacle window defining a base of the receptacle port; a lens array including lenses positioned on the receptacle window; and at least one receptacle alignment feature.

    Abstract translation: 本公开通常涉及使用光信号通过网络传输数据的高速光纤网络。 所公开的主题包括与透镜容器和/或光电子组件有关的装置和方法。 在一些方面,所公开的装置和方法涉及一种透镜容器,其包括在容器顶部和容器底部之间延伸的容器体,所述容器主体包括:端口主体,其限定插座端口,在容器顶部具有开口; 容器窗口,限定所述插座端口的底座; 透镜阵列,包括位于容器窗口上的透镜; 和至少一个插座对准特征。

    OPTICAL SUBASSEMBLY WITH AN EXTENDED RF PIN
    24.
    发明申请
    OPTICAL SUBASSEMBLY WITH AN EXTENDED RF PIN 审中-公开
    光扩散的射频PIN

    公开(公告)号:US20130163917A1

    公开(公告)日:2013-06-27

    申请号:US13720512

    申请日:2012-12-19

    CPC classification number: G02B6/4201 G02B6/4263 G02B6/4271 G02B6/4279

    Abstract: An optical subassembly (OSA) with an extended radio frequency (RF) pin. In one example embodiment, an OSA includes a header, a metallic ring, an RF insulator eyelet, and an RF pin. The header defines an insulator opening and includes an internal header surface. The metallic ring extends above the internal header surface and includes a metallic ring inner diameter substantially equivalent to a diameter of the insulator opening. The RF insulator eyelet is positioned partially in the insulator opening and partially in the metallic ring and defines an RF pin opening. The RF pin is positioned in the RF pin opening and extends through the insulator opening and the metallic ring.

    Abstract translation: 具有扩展射频(RF)引脚的光学子组件(OSA)。 在一个示例性实施例中,OSA包括头部,金属环,RF绝缘体孔眼和RF针脚。 集管限定绝缘体开口并且包括内部集管表面。 金属环在内部集管表面上方延伸,并且包括基本上等于绝缘体开口直径的金属环内径。 RF绝缘体孔眼部分地位于绝缘体开口中并且部分地位于金属环中并且限定RF引脚开口。 RF引脚定位在RF引脚开口中并延伸穿过绝缘体开口和金属环。

    Communication module packaging
    25.
    发明授权

    公开(公告)号:US10952312B2

    公开(公告)日:2021-03-16

    申请号:US16178507

    申请日:2018-11-01

    Abstract: A communication module may include a communication ground layer. The communication module may also include a circuit board. The circuit board may be located proximate the communication ground layer. The circuit board may include a stitch layer. The stitch layer may be electrically coupled to the communication ground layer via a plurality of stitch layer vias. Additionally, the communication module may include multiple ground vias. The ground vias may be electrically coupled to a portion of the circuit board and to the communication ground layer.

    Chip on carrier
    26.
    发明授权

    公开(公告)号:US10374386B1

    公开(公告)日:2019-08-06

    申请号:US16003074

    申请日:2018-06-07

    Abstract: A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer.

    Optoelectronic subassembly with components mounted on top and bottom of substrate

    公开(公告)号:US10342141B2

    公开(公告)日:2019-07-02

    申请号:US15847798

    申请日:2017-12-19

    Abstract: This disclosure generally relates to high-speed fiber optic networks that use light signals to transmit data over a network. The disclosed subject matter includes devices and methods relating to header subassemblies and/or optoelectronic subassemblies. In some aspects, the disclosed devices and methods may relate to a header subassembly that can include: a substrate with a substrate top and a substrate bottom; at least one optoelectronic transducer on the substrate top; at least one top electrical component on the substrate top, the electrical component can be operably coupled with the optoelectronic transducer; and at least one bottom electrical component on the substrate bottom, the bottom electrical component can be operably coupled with the optoelectronic transducer.

    Multi-lens optical components
    28.
    发明授权

    公开(公告)号:US09804349B2

    公开(公告)日:2017-10-31

    申请号:US14881693

    申请日:2015-10-13

    Abstract: This disclosure generally relates to high-speed fiber optic networks that use light signals to transmit data over a network. The disclosed subject matter includes devices and methods relating to multi-lens optical components and/or optoelectronic subassemblies. In some aspects, devices and methods relate to an optical component including a housing defining a cavity and a lens array having a plurality of lenses on an optically transmissive portion of the housing. In some aspects, devices and methods relate to an optical component including a substrate; and a lens array on the substrate, the lens array having a plurality of discrete lenses.

    3-D integrated package
    29.
    发明授权
    3-D integrated package 有权
    3-D集成包装

    公开(公告)号:US09437912B2

    公开(公告)日:2016-09-06

    申请号:US14691552

    申请日:2015-04-20

    Abstract: In an example embodiment, an electronics package includes one or more insulating layers and an electrically conductive transmission line. The electrically conductive transmission line includes a signal trace disposed substantially parallel to the one or more insulating layers. The electrically conductive transmission line further includes one or more signal vias electrically coupled to the signal trace. The one or more signal vias are configured to pass through at least a portion of the one or more insulating layers. The electronics package further includes one or more electrically conductive ground planes substantially parallel to the one or more insulating layers. The ground planes include one or more signal via ground cuts. The one or more signal via ground cuts provide clearance between the one or more signal vias and the one or more ground planes.

    Abstract translation: 在示例性实施例中,电子封装包括一个或多个绝缘层和导电传输线。 导电传输线包括基本上平行于一个或多个绝缘层设置的信号迹线。 导电传输线还包括电耦合到信号迹线的一个或多个信号通孔。 一个或多个信号通孔被配置成穿过一个或多个绝缘层的至少一部分。 电子封装还包括基本上平行于一个或多个绝缘层的一个或多个导电接地平面。 地平面包括一个或多个通过地面切割的信号。 通过接地切口的一个或多个信号在一个或多个信号通孔和一个或多个接地平面之间提供间隙。

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