公开(公告)号：US20160099171A1

公开(公告)日：2016-04-07

申请号：US14969154

申请日：2015-12-15

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xiang HU ,  Yuping REN ,  Duohui BEI ,  Sipeng GU ,  Huang LIU

IPC: H01L21/768 ,  H01L21/311

CPC classification number: H01L21/76816 ,  H01L21/02063 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76831 ,  H01L23/5226 ,  H01L23/5384 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods are provided for dimension-controlled via formation over a circuit structure, including over multiple adjacent conductive structures. The method(s) includes, for instance, providing a patterned multi-layer stack structure above the circuit structure, the stack structure including at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening; providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening; and etching through the at least one layer of the stack structure using the at least one dimension-controlled via opening to facilitate providing the via(s) over the circuit structure. In one implementation, the stack structure includes a trench-opening within a patterned hard mask layer disposed between a dielectric layer and a planarization layer, and the via(s) is partially self-aligned to the trench.

公开(公告)号：US20150364336A1

公开(公告)日：2015-12-17

申请号：US14306920

申请日：2014-06-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hong YU ,  Haigou HUANG ,  Jin Ping LIU ,  Huang LIU

IPC: H01L21/3105 ,  H01L21/311

CPC classification number: H01L21/31055 ,  H01L21/02318 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/823821 ,  H01L21/823842

Abstract: A semiconductor structure with mixed n-type and p-type non-planar transistors includes a residual overlapping mask bump on one or more of the dummy gates. A dielectric layer is created over the structure having a top surface above the residual bump, for example, using a blanket deposition and chemical-mechanical underpolish (i.e., stopping before exposing the gate cap). The residual bump is then transformed into a same material as the dielectric, either in its entirety and then removing the combined dielectric, or by removing the dielectric first and partly removing the residual bump, the remainder of which is then transformed and the dielectric removed. In either case, the structure is planarized for further processing.

Abstract translation: 具有混合n型和p型非平面晶体管的半导体结构包括在一个或多个虚拟栅极上的残留重叠掩模凸块。 例如，使用覆盖沉积和化学机械的低估（即，在暴露栅极盖之前停止），在该结构上方形成介电层，该顶表面具有顶部表面。 然后将剩余的凸块转变成与电介质完全相同的材料，然后去除组合的电介质，或者通过首先去除电介质并部分去除残余凸块，然后将其余部分转化并除去电介质。 在任一种情况下，将结构平坦化用于进一步处理。

公开(公告)号：US20150357285A1

公开(公告)日：2015-12-10

申请号：US14799116

申请日：2015-07-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huy CAO ,  Songkram SRIVATHANAKUL ,  Huang LIU ,  Garo Jacques DERDERIAN ,  Boaz ALPERSON

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5329 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76831 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least one contact opening disposed over a semiconductor substrate; forming a carbon-rich contact liner material having a set carbon content conformally within the at least one contact opening disposed over the semiconductor substrate.

Abstract translation: 提供电路结构的导电接触结构及其制造方法。 该制造包括例如提供设置在半导体衬底上的至少一个接触开口; 在所述半导体衬底上设置的所述至少一个接触开口中形成具有固定碳含量的富碳接触衬垫材料。

公开(公告)号：US20150093877A1

公开(公告)日：2015-04-02

申请号：US14042997

申请日：2013-10-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Haigou HUANG ,  Huang LIU ,  Hongliang SHEN ,  Yongsik MOON

IPC: H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/31053 ,  H01L21/31055

Abstract: A method for fabricating a semiconductor device is provided, including forming a mask on a surface of a semiconductor substrate, creating isolation trenches within the substrate, and removing the mask from the substrate before depositing an insulating material within the trenches. The insulating material is then planarized to form a surface that is substantially coplanar with the surface of the semiconductor substrate.

Abstract translation: 提供了一种制造半导体器件的方法，包括在半导体衬底的表面上形成掩模，在衬底内形成隔离沟槽，以及在沟槽内淀积绝缘材料之前从衬底去除掩模。 然后将绝缘材料平坦化以形成与半导体衬底的表面基本上共面的表面。

公开(公告)号：US20140367803A1

公开(公告)日：2014-12-18

申请号：US13917019

申请日：2013-06-13

Applicant: Globalfoundries, Inc.

Inventor： Hong YU ,  Wang ZHENG ,  Huang LIU ,  Yongsik MOON

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/28 ,  H01L29/49

CPC classification number: H01L29/785 ,  H01L21/28008 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/66795

Abstract: An intermediate semiconductor structure of a FinFET device in fabrication includes a substrate, a plurality of fin structures coupled to the substrate and a dummy gate disposed perpendicularly over the fin structures. A portion of the dummy gate is removed between the fin structures to create one or more vias and the one or more vias are filled with a dielectric. The dummy gate is then replaced with a metal gate formed around the dielectric-filled vias.

Abstract translation: 在制造中的FinFET器件的中间半导体结构包括衬底，耦合到衬底的多个翅片结构和垂直于翅片结构设置的虚拟栅极。 在翅片结构之间去除虚拟栅极的一部分以产生一个或多个通孔，并且一个或多个通孔用电介质填充。 然后用在电介质填充的通孔周围形成的金属栅极替换虚拟栅极。

公开(公告)号：US20140346648A1

公开(公告)日：2014-11-27

申请号：US13900976

申请日：2013-05-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Huy CAO ,  Huang LIU ,  Vijayalakshmi SESHACHALAM

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/345 ,  C23C16/505 ,  C23C16/515 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02211

Abstract: A low-K nitride film and a method of making are disclosed. Embodiments include forming a nitride film on a substrate by plasma enhanced chemical vapor deposition (PECVD) and periodically fluctuating a production of radicals during the PECVD based, at least in part, on plural cycles of a radiofrequency (RF) induced plasma.

Abstract translation: 公开了一种低K氮化物膜及其制造方法。 实施例包括通过等离子体增强化学气相沉积（PECVD）在衬底上形成氮化物膜，并且至少部分地基于射频（RF）感应等离子体的多个周期周期性地在PECVD期间波动自由基的产生。