公开(公告)号：US11551956B2

公开(公告)日：2023-01-10

申请号：US16911466

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Chandrashekara Shashank Kaira ,  Phillip C. Miller ,  Purushotham Kaushik Muthur Srinath ,  Deepak Goyal

IPC: H01L21/67 ,  G01J5/00

Abstract: According to the various examples, a fully integrated system and method for failure analysis using RF-based thermometry enable the detection and location of defects and failures in complex semiconductor packaging architectures. The system provides synchronous amplified RF signals to generate unique thermal signatures at defect locations based on dielectric relaxation loss and heating.

公开(公告)号：US10935593B2

公开(公告)日：2021-03-02

申请号：US15857520

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Deepak Goyal ,  Mayue Xie ,  Sivaseetharaman Pandi

IPC: G01R31/28 ,  G01R23/20 ,  H04L1/00

Abstract: A method, system and computer readable medium for determination of distance to an electrical fault within a device. A signal generator excites the device with an electrical input signal. The device comprises an open circuited electrical transmission line. A frequency domain analyzer analyzes part of the signal reflected from the device for determination of the locations of resonant frequency of the signal within the device. A computer calculates the distance to the fault within the device, based on the resonant frequency. The distance to the fault is one quarter wavelength distance into the device at the resonant frequency. A frequency sweeper sweeps the frequency of the input signal and repeated calculation of the distance to the fault made at a plurality of resonant frequencies during the frequency sweep confirms the distance to the fault by convergence of the result of the repeated calculations to substantially the same location.

公开(公告)号：US10908206B2

公开(公告)日：2021-02-02

申请号：US16302555

申请日：2016-05-17

Applicant: Intel Corporation

Inventor： Mayue Xie ,  Chengqing Hu ,  Jong-Ru Guo ,  Zuoguo Wu ,  Deepak Goyal

IPC: G01R31/28 ,  G01R31/11 ,  H04B10/071

Abstract: Disclosed herein are systems and methods for the characterization of transmission media, among other embodiments. For example, a system for characterizing a transmission medium may include: a waveform generator to generate an initial input waveform; waveform pre-processing circuitry to process the initial waveform to generate a processed input waveform for provision to the transmission medium, wherein the processed input waveform has a maximum amplitude greater than a maximum amplitude of the initial input waveform; and waveform output circuitry to display or store data representative of an initial output waveform, wherein the initial output waveform is output from the transmission medium as a reflection or transmission of the processed input waveform.

公开(公告)号：US20210013117A1

公开(公告)日：2021-01-14

申请号：US16504698

申请日：2019-07-08

Applicant: Intel Corporation

Inventor： Peng Li ,  Kelly P. Lofgreen ,  Manish Dubey ,  Bamidele Daniel Falola ,  Ken Hackenberg ,  Shenavia S. Howell ,  Sergio Antonio Chan Arguedas ,  Yongmei Liu ,  Deepak Goyal

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/433 ,  H01L21/48

Abstract: Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.

公开(公告)号：US10746780B2

公开(公告)日：2020-08-18

申请号：US15776979

申请日：2015-11-18

Applicant: Intel Corporation

Inventor： Mayue Xie ,  Simranjit S. Khalsa ,  Hemachandar Tanukonda Devarajulu ,  Deepak Goyal ,  Zhiguo Qian

IPC: G01R31/11 ,  G01R31/28 ,  G01R31/311

Abstract: An apparatus comprises a signal generator circuit, a test probe, a signal sensor circuit, and a defect detection circuit. The signal generator circuit is configured to generate an impulse test signal having an impulse waveform and adjust a bandwidth of the impulse test signal. The test probe is electrically coupled to the signal generator circuit and configured to apply the impulse test signal to a device under test (DUT). The signal sensor circuit is configured to sense a conducted test signal produced by applying the impulse test signal to the DUT with the test probe. The defect detection circuit is configured to generate an indication of a defect in the DUT using the conducted test signal.

公开(公告)号：US20170176173A1

公开(公告)日：2017-06-22

申请号：US14973131

申请日：2015-12-17

Applicant: Intel Corporation

Inventor： Yanmei Song ,  Yongmei Liu ,  Deepak Goyal ,  Donglai David Lu ,  Marcel A. Wall

IPC: G01B11/06

CPC classification number: G01B11/065

Abstract: Described herein are devices and techniques for measuring a thickness of a surface layer. A device can include a detector, a processor, and a memory. The detector can be arranged to receive reflected light from a surface of a sample. The processor can be in electrical communication with the detector. The memory can store instructions that, when executed by the processor, can cause the processor to perform operations. The operations can include receiving optical data from the detector, determining a polarization change of the reflected light, the polarization change being a function of the optical data, and determining a thickness of the surface layer using the polarization change and the wavelength of the incident light. The optical data can include information regarding the phase difference of the reflected light and the incident light. Also described are other embodiments.

公开(公告)号：US09389064B2

公开(公告)日：2016-07-12

申请号：US14229446

申请日：2014-03-28

Applicant: Intel Corporation

Inventor： Shuhong Liu ,  Zhiyong Wang ,  Nilanjan Ghosh ,  Deepak Goyal

IPC: G01B11/02 ,  G01B9/02 ,  G01B11/06 ,  G01N21/956 ,  G02B21/00

CPC classification number: G01N21/9501 ,  G01B9/0203 ,  G01B9/0209 ,  G01B11/0675 ,  G01B2210/56 ,  G01N21/956 ,  G02B21/0016

Abstract: Embodiments include devices, systems and processes for using a white light interferometer (WLI) microscope with a tilted objective lens to perform in-line monitoring of both resist footing defects and conductive trace undercut defects. The defects may be detected at the interface between dry film resist (DFR) footings and conductive trace footing formed on insulating layer top surfaces of a packaging substrate. Such footing and undercut defects may other wise be considered “hidden defects”. Using the WLI microscope with a tilted objective lens provides a high-throughput and low cost metrology and tool for non-destructive, non-contact, in-line monitoring.

Abstract translation: 实施例包括使用具有倾斜物镜的白光干涉仪（WLI）显微镜的装置，系统和方法，以执行两种抗蚀剂基础缺陷和导电迹线底切缺陷的在线监测。 可以在干膜抗蚀剂（DFR）底脚与形成在包装基材的绝缘层顶表面上的导电迹线基底之间的界面处检测到缺陷。 这种基础和底切缺陷可能被认为是“隐藏的缺陷”。 使用具有倾斜物镜的WLI显微镜为非破坏性，非接触式在线监测提供了高吞吐量和低成本的计量和工具。

公开(公告)号：US12094800B2

公开(公告)日：2024-09-17

申请号：US16721809

申请日：2019-12-19

Applicant: Intel Corporation

Inventor： Zhimin Wan ,  Jin Yang ,  Chia-Pin Chiu ,  Peng Li ,  Deepak Goyal

IPC: H01L23/31 ,  H01L23/367 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/373 ,  H01L23/538

CPC classification number: H01L23/3675 ,  H01L23/3121 ,  H01L23/3185 ,  H01L25/0652 ,  H01L25/18 ,  H01L23/3731 ,  H01L23/3736 ,  H01L23/3738 ,  H01L23/538 ,  H01L24/32 ,  H01L2224/32225

Abstract: Embodiments include semiconductor packages. A semiconductor package includes first and second bottom dies on a package substrate, first top dies on the first bottom die, and second top dies on the second bottom die. The semiconductor package includes thermally conductive slugs on the first bottom die and the second bottom die. The thermally conductive slugs are comprised of a high thermal conductive material. The thermally conductive slugs are positioned directly on outer edges of top surfaces of the first and second bottom dies, inner edges of the top surfaces of the first and second bottom dies, and/or a top surface of the package substrate. The high thermal conductive material of the thermally conductive slugs is comprised of copper, silver, boron nitride, or graphene. The thermally conductive slugs may have two different thicknesses. The semiconductor package may include an active die and/or an integrated heat spreader with the pedestals.

公开(公告)号：US11476120B2

公开(公告)日：2022-10-18

申请号：US16481056

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Purushotham Kaushik Muthur Srinath ,  Richard Kenneth Brewer ,  Deepak Goyal

IPC: H01L21/027 ,  H01J37/31 ,  H01L21/265 ,  H01J37/30

Abstract: Systems and methods of sample preparation using dual ion beam trenching are described. In an example, an inside of a semiconductor package is non-destructively imaged to determine a region of interest (ROI). A mask is positioned over the semiconductor package, and a mask window is aligned with the ROI. A first ion beam and a second ion beam are swept, simultaneously or sequentially, along an edge of the mask window to trench the semiconductor package and to expose the ROI for analysis.

公开(公告)号：US20200166569A1

公开(公告)日：2020-05-28

申请号：US16199092

申请日：2018-11-23

Applicant: Intel Corporation

Inventor： Mario Pacheco ,  Deepak Goyal

IPC: G01R31/303 ,  G01N23/04

Abstract: Embodiments may relate an x-ray filter. The x-ray filter may be configured to be positioned between an x-ray source output and a device under test (DUT) that is to be x-rayed. The x-ray filter may include at least 80% titanium (Ti) by weight. Other embodiments may be described or claimed.