公开(公告)号：US12287552B2

公开(公告)日：2025-04-29

申请号：US18508246

申请日：2023-11-14

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Masashi Tsubuku ,  Toshinari Sasaki ,  Takaya Tamaru

IPC: G02F1/1362 ,  G02F1/1368 ,  G06F3/044

Abstract: A display device includes a plurality of pixel electrodes each connected to a semiconductor device, a plurality of common electrodes each disposed opposite to a part of the plurality of pixel electrodes, and a plurality of common wirings each connected to the plurality of common electrodes. The semiconductor device includes an oxide semiconductor layer having a polycrystalline structure, and at least a part of each common wiring is composed of the oxide semiconductor layer. Each common electrode may be located across a plurality of pixel electrodes.

公开(公告)号：US12237345B2

公开(公告)日：2025-02-25

申请号：US18366859

申请日：2023-08-08

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Akihiro Hanada ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US12108627B2

公开(公告)日：2024-10-01

申请号：US17533127

申请日：2021-11-23

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Kentaro Miura ,  Hajime Watakabe ,  Ryo Onodera

IPC: H01L27/32 ,  H01L51/56 ,  H10K59/121 ,  H10K59/126 ,  H10K71/00 ,  H01L27/12 ,  H01L29/786 ,  H10K59/12 ,  H10K59/123

CPC classification number: H10K59/1213 ,  H10K59/126 ,  H10K71/00 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H10K59/1201 ,  H10K59/123

Abstract: A display device includes a first transistor having a first semiconductor layer, in which a first source region includes a first region in contact with a first source electrode, and a first drain region includes a second region in contact with a first drain electrode. The first source and drain regions, the first region, and the second region each include a first impurity element. In a region close to an interface between the first semiconductor layer and a first insulating layer, a concentration of the first impurity element included in the first and second regions is higher than a concentration of the first impurity element included in the first source region and the first drain region. A method of manufacturing a display device includes forming a first gate electrode and a light shielding layer on a first insulating layer, and forming a second semiconductor layer on the light shielding layer.

公开(公告)号：US11942484B2

公开(公告)日：2024-03-26

申请号：US17876063

申请日：2022-07-28

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hajime Watakabe ,  Kazufumi Watabe

IPC: H01L27/12 ,  G06F1/26 ,  H02J13/00 ,  H04L41/069 ,  H04L47/2416 ,  H04L67/12 ,  H01L29/423 ,  H01L29/51 ,  H01L29/786 ,  H04Q9/02

CPC classification number: H01L27/1225 ,  G06F1/26 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1251 ,  H02J13/00 ,  H02J13/00016 ,  H04L41/069 ,  H04L47/2416 ,  H04L67/12 ,  H01L29/42384 ,  H01L2029/42388 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78606 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  H04Q9/02 ,  H04Q2209/826

Abstract: A semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US11855117B2

公开(公告)日：2023-12-26

申请号：US17167081

申请日：2021-02-04

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Akihiro Hanada ,  Marina Mochizuki ,  Ryo Onodera ,  Fumiya Kimura ,  Isao Suzumura

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14636 ,  H01L27/14689

Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.

公开(公告)号：US11550195B2

公开(公告)日：2023-01-10

申请号：US17506694

申请日：2021-10-21

Applicant: Japan Display Inc.

Inventor： Toshihide Jinnai ,  Hajime Watakabe ,  Akihiro Hanada ,  Ryo Onodera ,  Isao Suzumura

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.

公开(公告)号：US11362113B2

公开(公告)日：2022-06-14

申请号：US16986462

申请日：2020-08-06

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Toshihide Jinnai ,  Ryo Onodera ,  Akihiro Hanada

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20180076239A1

公开(公告)日：2018-03-15

申请号：US15678501

申请日：2017-08-16

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L27/1251 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02675 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1229 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/127 ,  H01L27/1274 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78675 ,  H01L29/78693 ,  H01L2227/323

Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.

公开(公告)号：US20140191231A1

公开(公告)日：2014-07-10

申请号：US14206858

申请日：2014-03-12

Applicant: JAPAN DISPLAY INC.

Inventor： Tetsuya SHIBATA ,  Hajime Watakabe ,  Atsushi Sasaki ,  Yuki Matsuura ,  Muneharu Akiyoshi ,  Hiroyuki Watanabe

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

Abstract translation: 根据一个实施例，制造薄膜晶体管电路衬底的方法包括在绝缘衬底上形成氧化物半导体薄膜，形成栅极绝缘膜和栅电极，所述栅极绝缘膜和栅电极层叠在氧化物半导体薄膜的第一区域上 ，并且从所述栅极绝缘膜暴露所述氧化物半导体薄膜的第二区域和第三区域，所述第二区域和所述第三区域位于所述氧化物半导体薄膜的所述第一区域的两侧，形成层间绝缘膜 包括硅的悬挂键，覆盖第二区域的层间绝缘膜和氧化物半导体薄膜的第三区域，栅极绝缘膜和栅电极，以及形成源电极和漏电极。

公开(公告)号：US12072595B2

公开(公告)日：2024-08-27

申请号：US18503351

申请日：2023-11-07

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshihide Jinnai ,  Isao Suzumura ,  Hajime Watakabe ,  Ryo Onodera

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136277 ,  G02F1/136286 ,  H01L29/78633 ,  H01L29/78672 ,  H10K50/865 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.