公开(公告)号：US20100176459A1

公开(公告)日：2010-07-15

申请号：US12441220

申请日：2007-09-19

申请人： Lars-Erik Wernersson ,  Erik Lind ,  Tomas Bryllert ,  Jonas Ohlsson ,  Truls Löwgren ,  Lars Samuelson ,  Claes Thelander

发明人： Lars-Erik Wernersson ,  Erik Lind ,  Tomas Bryllert ,  Jonas Ohlsson ,  Truls Löwgren ,  Lars Samuelson ,  Claes Thelander

IPC分类号： H01L27/088 ,  H01L21/36

CPC分类号： H01L27/0883 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/20 ,  H01L29/775 ,  H01L29/7828

摘要： The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring the work function of the gate stack, by strain engineering, by control of the dielectrica or the choice of nanowire material. Transistors with varying threshold voltages are provided on the same substrate, which enables the design of advanced circuits utilizing the shifts in the threshold voltages, similar to the directly coupled field logic.

摘要翻译： 本发明涉及具有封盖几何形状的垂直纳米线晶体管。 垂直纳米线晶体管的阈值电压由纳米线的直径，纳米线的掺杂，纳米线中的异质结构段的引入，纳米线周围的壳结构中的掺杂来调节，栅极的功函数 堆叠，通过应变工程，通过控制电介质或纳米线材料的选择。 具有不同阈值电压的晶体管设置在相同的基板上，这使得能够利用阈值电压的偏移设计高级电路，类似于直接耦合的场逻辑。

公开(公告)号：US08843136B2

公开(公告)日：2014-09-23

申请号：US12141589

申请日：2008-06-18

申请人： Jonas Ohlsson ,  Simon Hultgren ,  Olof Torstensson

发明人： Jonas Ohlsson ,  Simon Hultgren ,  Olof Torstensson

IPC分类号： H04W36/18 ,  H04W56/00 ,  H04W48/20 ,  H04B7/26

CPC分类号： H04B7/2684 ,  H04W36/18 ,  H04W56/0045

摘要： In a mobile communications network, drifts in timing of user equipment in soft handover may be accounted for by measuring the offset between the current timing of the user equipment and the first significant path of downlink frames from cells of the active set at first and second instances. Differences in the respective offsets from the first and second instances may be calculated to determine if the drift is unidirectional in time for all cells of the active set. A unidirectional drift in the offsets is indicative of a drift in timing of the user equipment, allowing the current timing to be momentarily unfrozen and updated.

摘要翻译： 在移动通信网络中，软切换中的用户设备的定时漂移可以通过在第一和第二实例中测量用户设备的当前定时与来自活动集的小区的下行链路帧的第一有效路径之间的偏移来考虑 。 可以计算与第一和第二实例的各个偏移量的差异，以确定活动集合的所有单元的漂移是否是单向的。 偏移中的单向漂移表示用户设备的定时漂移，允许当前定时被暂时解冻和更新。

公开(公告)号：US08664636B2

公开(公告)日：2014-03-04

申请号：US13133371

申请日：2009-12-21

申请人： Steven Louis Konsek ,  Yourii Martynov ,  Jonas Ohlsson ,  Peter Jesper Hanberg

发明人： Steven Louis Konsek ,  Yourii Martynov ,  Jonas Ohlsson ,  Peter Jesper Hanberg

IPC分类号： H01L33/04

CPC分类号： H01L33/06 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02603 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/413 ,  H01L29/417 ,  H01L31/035281 ,  H01L33/24 ,  H01L33/38 ,  Y02E10/50

摘要： A nanostructured device according to the invention comprises a first group of nanowires protruding from a substrate where each nanowire of the first group of nanowires comprises at least one pn- or p-i-n-junction. A first contact, at least partially encloses and is electrically connected to a first side of the pn- or p-i-n-junction of each nanowire in the first group of nanowires. A second contacting means comprises a second group of nanowires that protrudes from the substrate, and is arranged to provide an electrical connection to a second side of the pn- or p-i-n-junction.

摘要翻译： 根据本发明的纳米结构器件包括从衬底突出的第一组纳米线，其中第一组纳米线的每个纳米线包含至少一个pn-或p-i-n结。 至少部分地包围并电连接到第一组纳米线中每个纳米线的pn或p-i-n结的第一侧的第一接触。 第二接触装置包括从衬底突出的第二组纳米线，并且被布置成提供到pn或p-i-n结的第二侧的电连接。

公开(公告)号：US20130203242A1

公开(公告)日：2013-08-08

申请号：US13518259

申请日：2010-12-22

申请人： Lars Samuelson ,  Knut Deppert ,  Jonas Ohlsson ,  Martin Magnusson

发明人： Lars Samuelson ,  Knut Deppert ,  Jonas Ohlsson ,  Martin Magnusson

IPC分类号： H01L21/02 ,  B03C7/00

CPC分类号： H01L29/0669 ,  B03C7/00 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02 ,  H01L21/0257 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02623 ,  H01L21/02628 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/66136 ,  H01L29/66143 ,  H01L31/035227 ,  H01L31/068 ,  H01L31/072 ,  H01L31/18

摘要： The present invention provides a method for aligning nanowires which can be used to fabricate devices comprising nanowires that has well-defined and controlled orientation independently on what substrate they are arranged on. The method comprises the steps of providing nanowires (1) and applying an electrical field (E) over the population of nanowires (1), whereby an electrical dipole moment of the nanowires makes them align along the electrical field (E). Preferably the nanowires are dispersed in a fluid during the steps of providing and aligning. When aligned, the nanowires can be fixated, preferably be deposition on a substrate (2). The electrical field can be utilised in the deposition. Pn-junctions or any net charge introduced in the nanowires (1) may assist in the aligning and deposition process. The method is suitable for continuous processing, e.g. in a roll-to-roll process, on practically any substrate materials and not limited to substrates suitable for particle assisted growth.

摘要翻译： 本发明提供了一种用于对准纳米线的方法，其可用于制造包含纳米线的器件，所述纳米线在其布置在其上的衬底上独立地具有明确且受控的取向。 该方法包括以下步骤：在纳米线（1）群上提供纳米线（1）和施加电场（E），由此纳米线的电偶极矩使得它们沿着电场（E）排列。 优选地，在提供和对准的步骤期间，纳米线分散在流体中。 当对准时，可以将纳米线固定，优选沉积在基底（2）上。 电场可用于沉积。 在纳米线（1）中引入的Pn结或任何净电荷可能有助于对准和沉积过程。 该方法适用于连续加工，例如 在卷对卷方法中，几乎适用于任何基底材料，不限于适用于颗粒辅助生长的基底。

公开(公告)号：US20120302279A1

公开(公告)日：2012-11-29

申请号：US13569290

申请日：2012-08-08

申请人： Xiaohui Wang ,  Jonas Ohlsson ,  Magnus Öst

发明人： Xiaohui Wang ,  Jonas Ohlsson ,  Magnus Öst

IPC分类号： H04W52/20 ,  H04W52/12

CPC分类号： H04W52/12 ,  H04B2201/709727 ,  H04W52/20 ,  H04W52/241

摘要： Outer-loop power control methods and apparatus are disclosed. In an exemplary embodiment, a short-term block error rate is measured for a received signal, and a coarse adjustment to a target signal-to-interference ratio (SIR) is calculated as a function of the short-term block error rate, a target block error rate, and a first loop tuning parameter. In some embodiments, a fine adjustment to the target SIR is also calculated, as a function of a smoothed block error rate, the target block error rate, and a second loop tuning parameter. The coarse adjustment provides quick responsiveness to received block errors, while the fine adjustment moderates the coarse adjustments by accounting for a longer-term view of the received block error rate. The target SIR adjustments disclosed herein may be computed in each of several iterations of an outer-loop power control loop.

摘要翻译： 公开了外环功率控制方法和装置。 在示例性实施例中，针对接收信号测量短期块错误率，并且根据短期块错误率计算对目标信号干扰比（SIR）的粗略调整， 目标块错误率和第一个循环调整参数。 在一些实施例中，还根据平滑的块错误率，目标块错误率和第二环路调整参数来计算对目标SIR的精细调整。 粗略调整提供对接收到的块错误的快速响应，而微调通过考虑接收到的块错误率的长期视图来缓和粗调。 可以在外环功率控制回路的几次迭代中的每一个中计算本文公开的目标SIR调整。

公开(公告)号：US08212237B2

公开(公告)日：2012-07-03

申请号：US13003046

申请日：2009-07-02

申请人： Lars Samuelson ,  Claes Thelander ,  Jonas Ohlsson ,  Anders Mikkelsen

发明人： Lars Samuelson ,  Claes Thelander ,  Jonas Ohlsson ,  Anders Mikkelsen

IPC分类号： H01L31/00

CPC分类号： H01L29/7881 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/803 ,  Y10S977/938

摘要： The present invention provides a nanostructured memory device comprising at least one semiconductor nanowire (3) forming a current transport channel, one or more shell layers (4) arranged around at least a portion of the nanowire (3), and nano-sized charge trapping centers (10) embedded in said one or more shell layers (4), and one or more gate electrodes (14) arranged around at least a respective portion of said one or more shell layers (4). Preferably said one or more shell layers (4) are made of a wide band gap material or an insulator. The charge trapping centers (10) may be charged/written by using said one or more gate electrodes (14) and a change in an amount of charge stored in one or more of the charge trapping centers (10) alters the conductivity of the nanowire (3).

摘要翻译： 本发明提供一种纳米结构存储器件，其包括形成电流传输沟道的至少一个半导体纳米线（3），围绕至少一部分纳米线（3）布置的一个或多个壳层（4）和纳米尺寸的电荷俘获 嵌入在所述一个或多个壳层（4）中的中心（10）以及围绕至少所述一个或多个壳层（4）的相应部分布置的一个或多个栅电极（14）。 优选地，所述一个或多个壳层（4）由宽带隙材料或绝缘体制成。 可以通过使用所述一个或多个栅电极（14）对电荷捕获中心（10）进行充电/写入，并且存储在一个或多个电荷捕获中心（10）中的电荷量的变化改变了纳米线的导电性 （3）。

公开(公告)号：US08178403B2

公开(公告)日：2012-05-15

申请号：US12441223

申请日：2007-09-18

申请人： Jonas Ohlsson ,  Lars Samuelson ,  Erik Lind ,  Lars-Erik Wernersson ,  Truls Löwgren

发明人： Jonas Ohlsson ,  Lars Samuelson ,  Erik Lind ,  Lars-Erik Wernersson ,  Truls Löwgren

IPC分类号： H01L21/76

CPC分类号： H01L29/7827 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/125 ,  H01L29/495 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66666 ,  H01L29/775 ,  H01L29/7828 ,  H01L29/78642 ,  H01L33/24 ,  Y10S977/888 ,  Y10S977/89

摘要： The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.

摘要翻译： 本发明涉及在垂直半导体器件（1）的垂直和水平表面（15,20）上提供不同厚度的层。 特别地，本发明涉及栅电极和在半导体结构中形成精密层（28），该半导体结构包括基底（10）和基本上从基底上竖立的细长结构（5）。 根据本发明的方法，将装置（1）的垂直几何结构与各向异性沉积或各向异性去除沉积材料结合使用以形成非常高精度的垂直或水平层。

公开(公告)号：US20090069042A1

公开(公告)日：2009-03-12

申请号：US12044185

申请日：2008-03-07

申请人： Xiaohui Wang ,  Jonas Ohlsson ,  Magnus Ost

发明人： Xiaohui Wang ,  Jonas Ohlsson ,  Magnus Ost

IPC分类号： H04B7/005

CPC分类号： H04W52/12 ,  H04B2201/709727 ,  H04W52/20 ,  H04W52/241

摘要： Outer-loop power control methods and apparatus are disclosed. In an exemplary embodiment, a short-term block error rate is measured for a received signal, and a coarse adjustment to a target signal-to-interference ratio (SIR) is calculated as a function of the short-term block error rate, a target block error rate, and a first loop tuning parameter. In some embodiments, a fine adjustment to the target SIR is also calculated, as a function of a smoothed block error rate, the target block error rate, and a second loop tuning parameter. The coarse adjustment provides quick responsiveness to received block errors, while the fine adjustment moderates the coarse adjustments by accounting for a longer-term view of the received block error rate. The target SIR adjustments disclosed herein may be computed in each of several iterations of an outer-loop power control loop.

摘要翻译： 公开了外环功率控制方法和装置。 在示例性实施例中，针对接收信号测量短期块错误率，并且根据短期块错误率计算对目标信号干扰比（SIR）的粗略调整， 目标块错误率和第一个循环调整参数。 在一些实施例中，还根据平滑的块错误率，目标块错误率和第二环路调整参数来计算对目标SIR的精细调整。 粗略调整提供对接收到的块错误的快速响应，而微调通过考虑接收到的块错误率的长期视图来缓和粗调。 可以在外环功率控制回路的几次迭代中的每一个中计算本文公开的目标SIR调整。

公开(公告)号：US07302276B2

公开(公告)日：2007-11-27

申请号：US10926742

申请日：2004-08-26

申请人： Bo Bernhardsson ,  Jonas Ohlsson ,  Mikael Zirèn

发明人： Bo Bernhardsson ,  Jonas Ohlsson ,  Mikael Zirèn

IPC分类号： H04B7/00 ,  H04Q7/20

CPC分类号： H04W52/246 ,  H04B17/327 ,  H04W52/14 ,  H04W52/228 ,  H04W52/242 ,  H04W52/245 ,  H04W52/50

摘要： Methods and apparatus are described for estimating a path-loss difference between uplink and downlink communications at a first node communicating with a second node in a communication system. A quantity of access request preambles transmitted by the first node to the second node before an acknowledgement from the second node of successful receipt of a preamble is received at the first node is determined. A difference between an uplink path-loss attributed to communications from the first node to the second node and a downlink path-loss attributed to communications to the first node from the second node is estimated based on the transmitted preamble quantity determination. Once the path-loss difference is estimated, the estimate can be used for many purposes, such as to determine a transmission power of the first node.

摘要翻译： 描述了用于估计在通信系统中与第二节点通信的第一节点处的上行链路和下行链路通信之间的路径损耗差异的方法和装置。 在第一节点处接收到来自第二节点的成功接收的确认之前由第一节点发送到第二节点的接入请求前导码的数量被确定。 基于所发送的前导码量确定，估计归因于从第一节点到第二节点的通信的上行链路路径损耗与归因于从第二节点到第一节点的通信的下行链路路径损耗之间的差异。 一旦路径损耗差被估计，该估计可用于许多目的，例如确定第一节点的发射功率。

公开(公告)号：US20070116100A1

公开(公告)日：2007-05-24

申请号：US11412543

申请日：2006-04-27

申请人： Bengt Lindoff ,  Bo Bernhardsson ,  Jonas Ohlsson

发明人： Bengt Lindoff ,  Bo Bernhardsson ,  Jonas Ohlsson

IPC分类号： H04B1/00

CPC分类号： H04B1/712 ,  H04B2201/7071 ,  H04B2201/709727

摘要： According to a method and apparatus taught herein, a Rake receiver circuit selectively operates with or without colored interference compensation, in dependence on current operating conditions. For example, in one embodiment the Rake receiver circuit comprises one or more processing circuits that are configured to generate Rake combining weights in a first mode of operation as first combining weights calculated from channel estimates corresponding to a set of Rake signal fingers. In a second mode, the processing circuit(s) generate the Rake combining weights as compensated combining weights obtained by compensating the first combining weights with second combining weights calculated from colored interference estimates corresponding to a set of Rake probing fingers.

摘要翻译： 根据本文教导的方法和装置，Rake接收器电路根据当前的操作条件选择性地在有或没有有色干涉补偿的情况下操作。 例如，在一个实施例中，Rake接收机电路包括一个或多个处理电路，其被配置为以第一操作模式生成Rake组合权重作为从对应于一组Rake信号指的信道估计计算的第一组合权重。 在第二模式中，处理电路产生Rake组合权重作为通过用对应于一组耙探测手指的有色干涉估计计算的第二组合权重来补偿第一组合权重而获得的补偿组合权重。