公开(公告)号：US5641431A

公开(公告)日：1997-06-24

申请号：US408961

申请日：1995-03-23

申请人： Takeshi Kinsho ,  Takaaki Shimizu ,  Tsutomu Ogihara ,  Ryuichi Saito ,  Kazuyuki Asakura ,  Mutsuo Nakashima

发明人： Takeshi Kinsho ,  Takaaki Shimizu ,  Tsutomu Ogihara ,  Ryuichi Saito ,  Kazuyuki Asakura ,  Mutsuo Nakashima

IPC分类号： C07F7/08 ,  C09K19/40 ,  C09K19/30

CPC分类号： C07F7/0896 ,  C07F7/0818 ,  C09K19/406

摘要： A silacyclohexanone compound represented by the following general formula (I). ##STR1## wherein Ar denotes a phenyl group or a tolyl group. R denotes a tolyl group, a linear-chain alkyl group with a carbon number of 2-10, a mono- or di-fluoroalkyl group with a carbon number of 1-10, a branched-chain alkyl group with a carbon number of 3-8 or an alkoxyalkyl group with a carbon number of 2-7. Also, a method of manufacturing silacyclohexane-type liquid crystal compounds represented by the general formula (II) ##STR2## and the general formula (III) ##STR3## which are derived from this compound.

摘要翻译： 由以下通式（I）表示的硅环己酮化合物。 （I）其中Ar表示苯基或甲苯基。 R表示甲苯基，碳数为2-10的直链烷基，碳数为1〜10的单 - 或二 - 氟烷基，碳数为3的支链烷基 -8或碳数为2-7的烷氧基烷基。 另外，由该化合物衍生的由通式（II）表示的硅环己烷型液晶化合物的制造方法（II）和通式（III）的化合物（III）。

公开(公告)号：US5629888A

公开(公告)日：1997-05-13

申请号：US182503

申请日：1994-01-18

申请人： Ryuichi Saito ,  Hidekatsu Onose ,  Yutaka Kobayashi ,  Michio Ohue

发明人： Ryuichi Saito ,  Hidekatsu Onose ,  Yutaka Kobayashi ,  Michio Ohue

IPC分类号： G11C14/00 ,  G11C11/22 ,  G11C11/56 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L27/112 ,  H01L27/115

CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C11/5657 ,  G11C16/08 ,  G11C8/14 ,  H01L27/10805

摘要： A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.

摘要翻译： 半导体存储器件具有阵列中的多个存储器单元，存储器单元数据可写入其中，并且随后可以读取存储单元。 每个存储单元具有开关元件，一个端子连接到阵列的位线，另一个端子连接到至少一个铁电电容器，以及控制端子连接到字线。 然后可以操作电池以在施加电压时检测铁电电容器的极化变化，这不足以引起铁电电容器的状态改变。 或者，铁电电容器和除铁电电容器之外的电容器连接到开关元件。 在另一替代方案中，多个铁电电容器连接到开关元件，使得不同的数据可写入每个。

公开(公告)号：US5585672A

公开(公告)日：1996-12-17

申请号：US443453

申请日：1995-05-18

申请人： Yoshihiko Koike ,  Ryuichi Saito ,  Sigeki Sekine ,  Yuuji Wakisawa

发明人： Yoshihiko Koike ,  Ryuichi Saito ,  Sigeki Sekine ,  Yuuji Wakisawa

IPC分类号： H01L23/373 ,  H01L25/07 ,  H01L25/18 ,  H01L23/10 ,  H01L23/34

CPC分类号： H01L23/3735 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/351

摘要： A semiconductor module having heat sink plates and an insulating plate laminated under the semiconductor chips, wherein the thickness of the support base plate is set to be 2.5 times in thickness of the insulating plate, which is the maximum thickness among the heat sink plates and the insulating plate laminated in the semiconductor module, so that the thermal fatigue lives of the solder layers are balanced, and the life of the whole semiconductor module can be prolonged.

摘要翻译： 一种半导体模块，其具有层叠在半导体芯片下的散热板和绝缘板，其中，所述支撑基板的厚度设定为所述绝热板的厚度的2.5倍，所述绝缘板是所述散热板和所述散热板之间的最大厚度 绝缘板层叠在半导体模块中，使得焊料层的热疲劳寿命平衡，并且可以延长整个半导体模块的寿命。

公开(公告)号：US5543539A

公开(公告)日：1996-08-06

申请号：US388308

申请日：1995-02-14

申请人： Takaaki Shimizu ,  Takeshi Kinsho ,  Tsutomu Ogihara ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

发明人： Takaaki Shimizu ,  Takeshi Kinsho ,  Tsutomu Ogihara ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

IPC分类号： C07F7/08 ,  C07F7/12 ,  C09K19/40

CPC分类号： C09K19/406 ,  C07F7/0818 ,  C07F7/0896 ,  C07F7/12

摘要： There is provided a silacyclohexane compound and method of making same. The silacyclohexane compound has the following formula (1): ##STR1## wherein R denotes a linear-chain alkyl group with a carbon number of 1-10, a mono- or di-fluoroalkyl group with a carbon number of 1-10, a branched-chain alkyl group with a carbon number of 3-8, an alkoxyalkyl group with a carbon number of 2-7, or an alkenyl group with a carbon number of 2-8, ##STR2## denotes a trans-1-sila-1,4-cyclohexylene or a trans-4-sila-1,4-cyclohexylene group having silicon at positions 1 or 4 with substitutional group(s) of H, F, C1 or CH.sub.3 ; n denotes 0 or 1; L.sub.1 and L.sub.2 independently denote H.F, C1, CN or CH.sub.3 ; L.sub.3 denotes F; m denotes O, 1 or 2; and X denotes H, CN, F, C1, CF.sub.3, CC1F.sub.2, CHFC1, OCC1F.sub.2, OCHFC1, OCHF.sub.2, OCF.sub.3, R or OR group.

摘要翻译： 提供硅环己烷化合物及其制备方法。 硅环己烷化合物具有下式（1）：其中R表示碳原子数为1〜10的直链烷基，碳数为1〜1的单 - 或二 - 氟代烷基， 10，碳数为3-8的支链烷基，碳数为2-7的烷氧基烷基或碳数为2-8的烯基，表示反式-1 -S1-1,4-亚环己基或具有位置1或4的具有H，F，C1或CH3取代基的硅的反式-4-硅烷-1,4-亚环己基; n表示0或1; L1和L2独立地表示H.F，C1，CN或CH3; L3表示F; m表示O，1或2; X表示H，CN，F，C1，CF3，CC1F2，CHFC1，OCC1F2，OCHFC1，OCHF2，OCF3，R或OR基。

公开(公告)号：US4956693A

公开(公告)日：1990-09-11

申请号：US28140

申请日：1987-03-19

申请人： Yasuo Sawahata ,  Ryuichi Saito ,  Naohiro Momma

发明人： Yasuo Sawahata ,  Ryuichi Saito ,  Naohiro Momma

IPC分类号： H01L29/73 ,  H01L21/265 ,  H01L21/331 ,  H01L21/74 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/10 ,  H01L29/167 ,  H01L29/78

CPC分类号： H01L21/26506 ,  H01L21/74 ,  H01L29/1079 ,  H01L29/167

摘要： Disclosed is a semiconductor device having a support region, an element-forming region (e.g., an epitaxial layer) and a buried layer between the support region and the element-forming region, with at least one of a MOS element and a bipolar element being formed in the element-forming region. The feature of the present invention resides in that atoms of at least one element selected from oxygen, nitrogen, carbon, argon, neon, krypton and helium is contained in a layer in at least one of the element-forming region and the buried layer, so as to suppress auto-doping of impurities from the buried layer into the element-forming region and suppress swelling of the buried layer.

摘要翻译： 公开了一种在支撑区域和元件形成区域之间具有支撑区域，元件形成区域（例如，外延层）和掩埋层的半导体器件，其中MOS元件和双极元件中的至少一个为 形成在元件形成区域中。 本发明的特征在于，选自氧，氮，碳，氩，氖，氪和氦中的至少一种元素的原子包含在元素形成区域和掩埋层中的至少一个中的层中， 从而抑制杂质从掩埋层自动掺杂到元件形成区域并抑制埋层的溶胀。

公开(公告)号：US4772927A

公开(公告)日：1988-09-20

申请号：US922347

申请日：1986-10-23

申请人： Ryuichi Saito ,  Naohiro Momma

发明人： Ryuichi Saito ,  Naohiro Momma

IPC分类号： H01L21/3215 ,  H01L21/336 ,  H01L27/092 ,  H01L27/11 ,  H01L29/04 ,  H01L29/167 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/66757 ,  H01L21/32155 ,  H01L27/0922 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1108 ,  H01L29/04 ,  H01L29/167 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78684

摘要： The present invention relates to a semiconductor device including a MOS transistor which is formed with a source region, a drain region and a channel region by the use of polycrystalline silicon, and a method of manufacturing the semiconductor device. Ions of carbon, oxygen or/and nitrogen are introduced into a polycrystalline silicon layer over the whole area thereof, and restrain conductive ions in the source and drain regions from diffusing into the channel region.

摘要翻译： 本发明涉及通过使用多晶硅形成有源区域，漏极区域和沟道区域的MOS晶体管的半导体器件以及半导体器件的制造方法。 碳，氧或/和氮的离子在其整个面积上被引入到多晶硅层中，并且抑制源区和漏区中的导电离子扩散到沟道区。

公开(公告)号：US11576084B2

公开(公告)日：2023-02-07

申请号：US17326817

申请日：2021-05-21

申请人： Ryuichi Saito

发明人： Ryuichi Saito

IPC分类号： H04L67/75 ,  H04W28/26 ,  H04B7/155 ,  H04L9/40 ,  H04W84/12

摘要： A resource management system includes a resource management device that manages a usage of a resource, a reservation management device that manages a reservation for the resource, and a communication relay device that communicates with the resource management device. The resource management device receives reservation information transmitted from the reservation management device. The reservation information is information on the reservation for the resource. The resource management device transmits, to the communication relay device, a request for identification information identifying the communication relay device. The resource management device receives the identification information, which is transmitted from the communication relay device in response to the request. The identification information is used to execute an event associated with the reservation information. The resource management device transmits, to an operation display terminal that displays a usage status of the resource, the identification information and a password that is associated with the identification information.

公开(公告)号：US08503209B2

公开(公告)日：2013-08-06

申请号：US13273162

申请日：2011-10-13

申请人： Takeshi Tokuyama ,  Kinya Nakatsu ,  Ryuichi Saito

发明人： Takeshi Tokuyama ,  Kinya Nakatsu ,  Ryuichi Saito

IPC分类号： H02M7/537 ,  H02M7/5387

CPC分类号： H05K7/20927 ,  H01L23/473 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H02M7/003 ,  H02M7/537 ,  H02M7/5387 ,  H05K7/209 ,  H01L2924/00

摘要： Technology leading to a size reduction in a power conversion apparatus comprising a cooling function and technology relating to enhancing productivity and enhancing reliability necessary for commercial production are provided. Series circuits comprising an upper arm and lower arm of an inverter circuit are built in a single semiconductor module 500. The semiconductor module has cooling metal on two sides. An upper arm semiconductor chip and lower arm semiconductor chip are wedged between the cooling metals. The semiconductor module is inserted inside a channel case main unit 214. A DC positive electrode terminal 532, a DC negative electrode terminal 572, and an alternating current terminal 582 of a semiconductor chip are disposed in the semiconductor module. The DC terminals 532 and 572 are electrically connected with a terminal of a capacitor module. The alternating current terminal 582 is electrically connected with a motor generator via an AC connector.

摘要翻译： 提供了一种功率转换装置的尺寸减小的技术，其包括与提高生产率并提高商业生产所需的可靠性相关的冷却功能和技术。 包括逆变器电路的上臂和下臂的串联电路内置在单个半导体模块500中。半导体模块在两侧具有冷却金属。 上臂半导体芯片和下臂半导体芯片楔入冷却金属之间。 半导体模块插入通道壳体主单元214内。半导体模块中设置有直流正极端子532，直流负极端子572和半导体芯片的交流端子582。 直流端子532和572与电容器模块的端子电连接。 交流端子582经由AC连接器与电动发电机电连接。

公开(公告)号：US20130168148A1

公开(公告)日：2013-07-04

申请号：US13822446

申请日：2011-11-24

申请人： Toshinobu Kanai ,  Ryuichi Saito ,  Hideki Higashitani

发明人： Toshinobu Kanai ,  Ryuichi Saito ,  Hideki Higashitani

IPC分类号： H05K1/02

CPC分类号： H05K1/0298 ,  H05K1/0269 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4638 ,  H05K2201/0191 ,  H05K2201/0355 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2203/068 ,  Y10T156/10

摘要： A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely.

摘要翻译： 多层布线基板包括双面布线板，堆叠在双面布线板上的绝缘基板，设置在绝缘基板中的通孔中的通孔，绝缘基板的上表面上的最外布线，第一基准 设置在双面布线板上的标记和设置在绝缘基板上的第二基准标记。 第一个基准标记包含双面接线板的布线。 第二个基准标记在通孔中至少包含一个通孔。 提供第一和第二基准标记用于将双面布线板和绝缘基板彼此定位。 这种多层布线板包括精确定位的层。

公开(公告)号：US20120033475A1

公开(公告)日：2012-02-09

申请号：US13273162

申请日：2011-10-13

申请人： Takeshi Tokuyama ,  Kinya Nakatsu ,  Ryuichi Saito

发明人： Takeshi Tokuyama ,  Kinya Nakatsu ,  Ryuichi Saito

IPC分类号： H02M7/537

CPC分类号： H05K7/20927 ,  H01L23/473 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H02M7/003 ,  H02M7/537 ,  H02M7/5387 ,  H05K7/209 ,  H01L2924/00

摘要： Technology leading to a size reduction in a power conversion apparatus comprising a cooling function and technology relating to enhancing productivity and enhancing reliability necessary for commercial production are provided. Series circuits comprising an upper arm and lower arm of an inverter circuit are built in a single semiconductor module 500. The semiconductor module has cooling metal on two sides. An upper arm semiconductor chip and lower arm semiconductor chip are wedged between the cooling metals. The semiconductor module is inserted inside a channel case main unit 214. A DC positive electrode terminal 532, a DC negative electrode terminal 572, and an alternating current terminal 582 of a semiconductor chip are disposed in the semiconductor module. The DC terminals 532 and 572 are electrically connected with a terminal of a capacitor module. The alternating current terminal 582 is electrically connected with a motor generator via an AC connector.

摘要翻译： 提供了一种功率转换装置的尺寸减小的技术，其包括与提高生产率并提高商业生产所需的可靠性相关的冷却功能和技术。 包括逆变器电路的上臂和下臂的串联电路内置在单个半导体模块500中。半导体模块在两侧具有冷却金属。 上臂半导体芯片和下臂半导体芯片楔入冷却金属之间。 半导体模块插入通道壳体主单元214内。半导体模块中设置有直流正极端子532，直流负极端子572和半导体芯片的交流端子582。 直流端子532和572与电容器模块的端子电连接。 交流端子582经由AC连接器与电动发电机电连接。