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公开(公告)号：US20170290146A1
公开(公告)日：2017-10-05
申请号：US15463538
申请日：2017-03-20
Applicant: NITTO DENKO CORPORATION
Inventor： Yuu SUGIMOTO , Yoshito FUJIMURA , Hiroyuki TANABE
CPC classification number: H05K1/0284 , H05K1/0274 , H05K1/05 , H05K3/0008 , H05K3/06 , H05K3/064 , H05K3/108 , H05K3/4644 , H05K3/4679 , H05K2201/09227 , H05K2201/09272 , H05K2203/0557 , H05K2203/056 , H05K2203/0562
Abstract: A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.
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公开(公告)号：US20170188465A1
公开(公告)日：2017-06-29
申请号：US15386744
申请日：2016-12-21
Applicant: NITTO DENKO CORPORATION
Inventor： Yuu SUGIMOTO , Hiroyuki TANABE
CPC classification number: H05K3/064 , G03F7/2002 , G03F7/26 , G03F7/40 , H05K1/056 , H05K3/108 , H05K3/44 , H05K3/4661 , H05K2203/0562
Abstract: The method for producing a wired circuit board including an insulating layer and a conductive pattern provided on the insulating layer includes the steps of the following: a step (1), in which the insulating layer is provided; a step (2), in which a metal thin film is provided on an inclined face of the insulating layer; a step (3), in which a photoresist is provided on the metal thin film; a step (4), in which a photomask is disposed so that in the photoresist, a portion where the conductive pattern is to be provided is shielded from light, and the photoresist is exposed to light through the photomask; a step (5), in which the portion of the photoresist shielded from light by the photomask is removed to expose the metal thin film corresponding to the portion; and a step (6), in which the conductive pattern is provided on the metal thin film exposed from the photoresist. When exposing the photoresist, reflection is caused by the metal thin film positioned on the inclined face to reduce light projected to the portion.
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公开(公告)号：US20160262258A1
公开(公告)日：2016-09-08
申请号：US15058502
申请日：2016-03-02
Applicant: NITTO DENKO CORPORATION
Inventor： Hiroyuki TANABE , Yoshito FUJIMURA , Yuu SUGIMOTO
IPC: H05K1/02
CPC classification number: H05K1/0213 , G11B5/4853 , H05K1/118 , H05K1/18 , H05K1/181 , H05K3/341 , H05K2201/05 , H05K2203/048 , Y02P70/613
Abstract: A wired circuit board includes a first insulating layer, a conductive pattern disposed on the first insulating layer and including a plurality of terminals arranged in parallel to be spaced apart from each other, and a second insulating layer disposed on the first insulating layer so as to cover the conductive pattern. Each of the terminals includes a main body portion and a protruding portion protruding from the main body portion and having a dimension in a parallel arrangement direction of the terminals which is shorter than a dimension of the main body portion thereof. The second insulating layer includes a plurality of end-portion covering portions disposed individually on both end portions of the main body portion in the parallel arrangement direction and exposing a middle portion of the main body portion and the protruding portion.
Abstract translation: 布线电路板包括第一绝缘层，布置在第一绝缘层上的导电图案，并且包括彼此平行布置的多个端子，以及设置在第一绝缘层上的第二绝缘层，以便 覆盖导电图案。 每个端子包括主体部分和从主体部分突出并且具有比其主体部分的尺寸短的端子的平行排列方向的尺寸的突出部分。 第二绝缘层包括多个端部覆盖部分，该多个端部覆盖部分分别设置在主体部分的平行排列方向的两个端部上，并且暴露出主体部分和突出部分的中间部分。
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公开(公告)号：US20160133284A1
公开(公告)日：2016-05-12
申请号：US14936102
申请日：2015-11-09
Applicant: NITTO DENKO CORPORATION
Inventor： Naohiro TERADA , Yoshito FUJIMURA , Hiroyuki TANABE , Saori KANEZAKI , Yuu SUGIMOTO
CPC classification number: G11B5/4826 , G11B5/484 , G11B5/4853 , G11B5/486
Abstract: A suspension board with circuit includes a slider mounting region configured to mount a slider thereon, a pedestal portion provided in the slider mounting region and configured to support the slider, and a dam portion provided in the slider mounting region and configured to prevent an adhesive fixing the slider from flowing out of the slider mounting region. The thickness of the pedestal portion is thicker than that of the dam portion.
Abstract translation: 具有电路的悬挂板包括：滑块安装区域，其构造成在其上安装滑块;基座部，设置在滑块安装区域中并构造成支撑滑块;以及阻挡部，其设置在滑块安装区域中并且构造成防止粘合固定 滑块从滑块安装区域流出。 基座部的厚度比坝部的厚度厚。
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公开(公告)号：US20200260588A1
公开(公告)日：2020-08-13
申请号：US16860383
申请日：2020-04-28
Applicant: NITTO DENKO CORPORATION
Inventor： Yuu SUGIMOTO , Hiroyuki TANABE , Yoshito FUJIMURA
Abstract: A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.
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Patent Agency Ranking
公开(公告)号：US20180124912A1
公开(公告)日：2018-05-03
申请号：US15800680
申请日：2017-11-01
Applicant: NITTO DENKO CORPORATION
Inventor： Daisuke YAMAUCHI , Hiroyuki TANABE
CPC classification number: H05K1/028 , H05K3/064 , H05K3/18 , H05K2201/0191 , H05K2201/09736
Abstract: A wired circuit board includes an insulating layer and a conductive layer. The insulating layer continuously has a first insulating portion, a second insulating portion having a thickness smaller than that of the first insulating portion, and a third insulating portion disposed between the first insulating portion and the second insulating portion and having a thickness that gradually becomes smaller from the first insulating portion toward the second insulating portion. The conductive layer continuously has a first conductive portion disposed at one-side surface of the first insulating portion and a second conductive portion disposed at one-side surface of the second insulating portion and having a thickness smaller than that of the first conductive portion. The first conductive portion is disposed at one-side surface of the second insulating portion and the third insulating portion or is disposed at one-side surface of the first insulating portion and the third insulating portion.
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公开(公告)号：US20180122411A1
公开(公告)日：2018-05-03
申请号：US15800692
申请日：2017-11-01
Applicant: NITTO DENKO CORPORATION
Inventor： Daisuke YAMAUCHI , Hiroyuki TANABE
CPC classification number: G11B5/486 , H05K1/0242 , H05K1/028 , H05K2201/09236
Abstract: A wired circuit board includes an insulating layer and a plurality of wires disposed at one-side surface in a thickness direction of the insulating layer at spaced intervals to each other. The plurality of wires have one pair of wires in parallel, the plurality of wires continuously have a first portion and a second portion in which the total sum of a line width of one wire of one pair of wires and an interval between one pair of wires is smaller than that of the first portion, and a thickness T1 of the first portion is large with respect to a thickness T2 of the second portion.
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公开(公告)号：US20180075871A1
公开(公告)日：2018-03-15
申请号：US15689695
申请日：2017-08-29
Applicant: NITTO DENKO CORPORATION
Inventor： Yuu SUGIMOTO , Hiroyuki TANABE
CPC classification number: G11B5/4853 , G11B5/3163 , G11B2005/0021 , H05K1/056 , H05K1/119 , H05K1/184 , H05K3/0023 , H05K3/0041 , H05K3/06 , H05K3/3405 , H05K3/4015 , H05K2201/09063 , H05K2201/09154 , H05K2201/09827 , H05K2201/10106
Abstract: A suspension board with circuit having an opening with an electronic element inserted therein includes an insulating layer disposed at the edge of the opening, a first terminal disposed at one surface of the insulating layer and connected to a magnetic head, and a second terminal disposed at the other surface thereof and connected to the electronic element. The insulating layer includes a first portion in which the first terminal is disposed and a second portion that extends from the first portion toward the opening and is overlapped with a slider. The second portion is thinner than the first portion and is overlapped with the second terminal. The slider has a first surface facing the second portion. The first surface is disposed between the first terminal and the second terminal.
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公开(公告)号：US20180070438A1
公开(公告)日：2018-03-08
申请号：US15696270
申请日：2017-09-06
Applicant: Nitto Denko Corporation
Inventor： Daisuke YAMAUCHI , Hiroyuki TANABE
CPC classification number: H05K1/0224 , G11B5/484 , G11B5/486 , H05K1/0228 , H05K1/056 , H05K1/09 , H05K1/115 , H05K3/4038 , H05K3/4644 , H05K2201/0154 , H05K2201/0195 , H05K2201/09227 , H05K2201/09254 , H05K2201/093 , H05K2201/10083
Abstract: In a suspension board, a first insulating layer is formed on a support substrate. A ground layer and a power wiring trace are formed on the first insulating layer. The ground layer has electric conductivity higher than that of the support substrate. A second insulating layer is formed on the first insulating layer to cover the ground layer and the power wiring trace. A write wiring trace is formed on the second insulating layer to overlap with the ground layer. In a stacking direction of the support substrate, the first insulating layer and the second insulating layer, a distance between the ground layer and the write wiring trace is larger than a distance between the power wiring trace and the write wiring trace.
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公开(公告)号：US20180014401A1
公开(公告)日：2018-01-11
申请号：US15712613
申请日：2017-09-22
Applicant: NITTO DENKO CORPORATION
Inventor： Yuu SUGIMOTO , Yoshito FUJIMURA , Hiroyuki TANABE
CPC classification number: H05K1/0284 , H05K1/0274 , H05K1/05 , H05K3/0008 , H05K3/06 , H05K3/064 , H05K3/108 , H05K3/4644 , H05K3/4679 , H05K2201/09227 , H05K2201/09272 , H05K2203/0557 , H05K2203/056 , H05K2203/0562
Abstract: A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.
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