公开(公告)号：US20160057867A1

公开(公告)日：2016-02-25

申请号：US14753433

申请日：2015-06-29

Applicant: NITTO DENKO CORPORATION

Inventor： Daisuke YAMAUCHI ,  Takatoshi SAKAKURA

IPC: H05K3/10 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K1/056 ,  G11B5/484 ,  H05K3/0082 ,  H05K3/027 ,  H05K3/064 ,  H05K3/44 ,  H05K2201/0969 ,  H05K2203/0323

Abstract: A method of producing a suspension board with circuit includes the steps of preparing a metal supporting layer; forming a curable insulating layer on the metal supporting layer using a photosensitive curable insulating composition such that an opening is formed in the curable insulating layer, curing the curable insulating layer to form an insulating layer, subjecting the metal supporting layer exposed from the opening to microwave plasma treatment, and forming a metal conducting portion on the metal supporting layer exposed from the opening.

Abstract translation: 具有电路的悬挂板的制造方法包括准备金属支撑层的工序; 在所述金属支撑层上形成可固化绝缘层，使用光敏固化绝缘组合物，使得在所述可固化绝缘层中形成开口，固化所述可固化绝缘层以形成绝缘层，使从所述开口露出的所述金属支撑层经受微波 等离子体处理，并且在从开口露出的金属支撑层上形成金属导电部分。

公开(公告)号：US20170339781A1

公开(公告)日：2017-11-23

申请号：US15597686

申请日：2017-05-17

Applicant: Nitto Denko Corporation

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: H05K1/02 ,  H05K1/05 ,  H05K1/09 ,  H05K3/46

CPC classification number: H05K1/0216 ,  G11B5/4853 ,  G11B5/486 ,  H05K1/0224 ,  H05K1/0245 ,  H05K1/0281 ,  H05K1/05 ,  H05K1/056 ,  H05K1/09 ,  H05K1/11 ,  H05K1/189 ,  H05K3/4644 ,  H05K2201/09036

Abstract: A first insulating layer is formed on a support substrate. The first insulating layer includes a first portion and a second portion. The second portion has a thickness smaller than that of the first portion. A ground layer having electric conductivity higher than that of the support substrate is formed on the second portion of the first insulating layer. The ground layer is electrically connected to the support substrate. A second insulating layer is formed on the first insulating layer to cover the ground layer. A write wiring trace is formed on the second insulating layer to overlap with the first portion and the second portion of the first insulating layer.

公开(公告)号：US20170171969A1

公开(公告)日：2017-06-15

申请号：US15373573

申请日：2016-12-09

Applicant: NITTO DENKO CORPORATION

Inventor： Hiroyuki TANABE ,  Naohiro TERADA ,  Yuu SUGIMOTO ,  Daisuke YAMAUCHI

IPC: H05K1/05 ,  G11B5/48 ,  H05K1/11 ,  H05K3/40 ,  H05K3/44

CPC classification number: H05K1/05 ,  G11B5/4826 ,  G11B5/484 ,  G11B5/4853 ,  H05K1/0278 ,  H05K1/0393 ,  H05K1/11 ,  H05K1/18 ,  H05K3/4007 ,  H05K3/44 ,  H05K2201/10227

Abstract: A suspension board with circuit includes a metal supporting board, a base insulating layer disposed at one side in a thickness direction of the metal supporting board, and a conductor layer disposed at one side in the thickness direction of the base insulating layer and including a connecting terminal electrically connected to a slider. The base insulating layer has a terminal region, when projected in the thickness direction, overlapped with at least the connecting terminal and a circumferential region not overlapped with the terminal region and around the terminal region, and the thickness of the terminal region is thicker than that of the circumferential region.

公开(公告)号：US20170171970A1

公开(公告)日：2017-06-15

申请号：US15373583

申请日：2016-12-09

Applicant: NITTO DENKO CORPORATION

Inventor： Hiroyuki TANABE ,  Naohiro TERADA ,  Yuu SUGIMOTO ,  Daisuke YAMAUCHI

IPC: H05K1/05 ,  H05K3/22 ,  H05K3/46

CPC classification number: H05K1/05 ,  G11B5/483 ,  G11B5/4853 ,  H05K1/117 ,  H05K3/22 ,  H05K3/3442 ,  H05K3/4608 ,  H05K3/4644 ,  H05K2201/10151 ,  H05K2201/10227 ,  Y02P70/613

Abstract: A suspension board with circuit includes a metal supporting board, a base insulating layer disposed at one side in a thickness direction of the metal supporting board, a conductor layer disposed at one side in the thickness direction of the base insulating layer and including a connecting terminal electrically connected to a slider, a cover insulating layer covering the conductor layer so as to expose the connecting terminal and disposed at the one side in the thickness direction of the base insulating layer, and a plating layer covering the connecting terminal. The cover insulating layer includes a first cover insulating layer disposed at the one side in the thickness direction of the base insulating layer and a second cover insulating layer disposed at one side in the thickness direction of the first cover insulating layer, and the thickness of the plating layer is not more than the total sum of the thickness of the first cover insulating layer and that of the second cover insulating layer.

公开(公告)号：US20160262265A1

公开(公告)日：2016-09-08

申请号：US15057518

申请日：2016-03-01

Applicant: Nitto Denko Corporation

Inventor： Hiroyuki TANABE ,  Daisuke YAMAUCHI

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/18 ,  H05K1/09

CPC classification number: H05K1/11 ,  G11B5/484 ,  H05K1/0242 ,  H05K1/09 ,  H05K1/111 ,  H05K3/0061 ,  H05K3/181 ,  H05K3/285 ,  H05K3/384 ,  H05K3/40 ,  H05K2201/0154 ,  H05K2201/09081 ,  H05K2201/10931 ,  H05K2203/072

Abstract: A printed circuit board includes first and second insulating layers, a wiring trace, a metal thin film, and a connection terminal. The wiring trace is formed on the first insulating layer. The metal thin film is formed on the wiring trace, and has a thickness larger than 0 nm and not more than 150 nm. The second insulating layer is formed on the first insulating layer to cover the metal thin film. The connection terminal is formed on the first insulating layer to be electrically connected to the wiring trace and exposed from the second insulating layer.

Abstract translation: 印刷电路板包括第一和第二绝缘层，布线迹线，金属薄膜和连接端子。 布线迹线形成在第一绝缘层上。 金属薄膜形成在布线轨迹上，其厚度大于0nm且不大于150nm。 第二绝缘层形成在第一绝缘层上以覆盖金属薄膜。 连接端子形成在第一绝缘层上以与布线迹线电连接并从第二绝缘层暴露。

公开(公告)号：US20170303390A1

公开(公告)日：2017-10-19

申请号：US15488808

申请日：2017-04-17

Applicant: Nitto Denko Corporation

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09 ,  H05K3/46

Abstract: In a suspension board, a ground layer and a first insulating layer are formed on a support substrate. The ground layer has electric conductivity higher than that of the support substrate. A power wiring trace is formed on the first insulating layer. A second insulating layer is formed on the support substrate to cover the ground layer and the first insulating layer. A write wiring trace is formed on the second insulating layer to at least partially overlap with the ground layer. A distance between the ground layer and the write wiring trace in a stacking direction of the support substrate, the first insulating layer and the second insulating layer is set larger than a distance between the power wiring trace and the write wiring trace in the stacking direction.

公开(公告)号：US20170034909A1

公开(公告)日：2017-02-02

申请号：US15223241

申请日：2016-07-29

Applicant: Nitto Denko Corporation

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: H05K1/02 ,  G11B5/48 ,  H05K1/09 ,  H05K3/46 ,  H05K1/03

CPC classification number: G11B5/4833 ,  G11B5/484 ,  H05K1/056 ,  H05K1/09 ,  H05K1/111 ,  H05K3/244 ,  H05K3/388 ,  H05K2201/0341 ,  H05K2201/0347 ,  H05K2201/05 ,  Y02P70/611

Abstract: A conductor trace is formed on a base insulating layer. The conductor trace includes two terminal portions and one wiring portion. The wiring portion is formed to connect the two terminal portions to each other and extend from each terminal portion. A metal cover layer is formed to cover the terminal portion and the wiring portion of the conductor trace and continuously extend from a surface of the terminal portion to a surface of the wiring portion. The metal cover layer is made of metal having magnetism lower than magnetism of nickel, and is made of gold, for example. A cover insulating layer is formed on the base insulating layer to cover a portion, of the metal cover layer formed on the conductor trace, covering the wiring portion and not to cover a portion of the metal cover layer covering the terminal portion.

Abstract translation: 在基底绝缘层上形成导体迹线。 导体迹线包括两个端子部分和一个布线部分。 布线部形成为将两个端子部彼此连接并从各端子部延伸。 形成金属覆盖层以覆盖导体迹线的端子部分和布线部分并且从端子部分的表面连续地延伸到布线部分的表面。 金属覆盖层由具有低于镍的磁性的金属制成，例如由金制成。 在绝缘层上形成覆盖绝缘层，以覆盖形成在导体迹线上的金属覆盖层的覆盖布线部分的部分，而不覆盖覆盖端子部分的金属覆盖层的一部分。

公开(公告)号：US20140338958A1

公开(公告)日：2014-11-20

申请号：US14448253

申请日：2014-07-31

Applicant: Nitto Denko Corporation

Inventor： Daisuke YAMAUCHI ,  Tetsuya OOSAWA ,  Mitsuru HONJO ,  Masami INOUE

IPC: H05K1/05 ,  H05K3/24 ,  C25D7/00

CPC classification number: H05K1/056 ,  C25D7/00 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/28 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/10977 ,  Y10T29/49124 ,  Y10T29/49126

Abstract: A base insulating layer is formed on a suspension body. A lead wire for plating and a wiring trace are integrally formed on the base insulating layer. A cover insulating layer is formed on the base insulating layer to cover the lead wire for plating and the wiring trace. A thickness of a portion of the cover insulating layer above a region of the base insulating layer in which the lead wire for plating is formed is set smaller than the thickness of a portion of the cover insulating layer above other regions of the base insulating layer.

Abstract translation: 基体绝缘层形成在悬架体上。 在基底绝缘层上一体地形成电镀用引线和布线迹线。 覆盖绝缘层形成在基底绝缘层上以覆盖电镀用引线和布线迹线。 在形成有电镀用引线的基极绝缘层的区域的上方的覆盖绝缘层的一部分的厚度设定为小于基底绝缘层的其它区域以上的覆盖绝缘层的一部分的厚度。

公开(公告)号：US20180124912A1

公开(公告)日：2018-05-03

申请号：US15800680

申请日：2017-11-01

Applicant: NITTO DENKO CORPORATION

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/18

CPC classification number: H05K1/028 ,  H05K3/064 ,  H05K3/18 ,  H05K2201/0191 ,  H05K2201/09736

Abstract: A wired circuit board includes an insulating layer and a conductive layer. The insulating layer continuously has a first insulating portion, a second insulating portion having a thickness smaller than that of the first insulating portion, and a third insulating portion disposed between the first insulating portion and the second insulating portion and having a thickness that gradually becomes smaller from the first insulating portion toward the second insulating portion. The conductive layer continuously has a first conductive portion disposed at one-side surface of the first insulating portion and a second conductive portion disposed at one-side surface of the second insulating portion and having a thickness smaller than that of the first conductive portion. The first conductive portion is disposed at one-side surface of the second insulating portion and the third insulating portion or is disposed at one-side surface of the first insulating portion and the third insulating portion.

公开(公告)号：US20180122411A1

公开(公告)日：2018-05-03

申请号：US15800692

申请日：2017-11-01

Applicant: NITTO DENKO CORPORATION

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: G11B5/48 ,  H05K1/02

CPC classification number: G11B5/486 ,  H05K1/0242 ,  H05K1/028 ,  H05K2201/09236

Abstract: A wired circuit board includes an insulating layer and a plurality of wires disposed at one-side surface in a thickness direction of the insulating layer at spaced intervals to each other. The plurality of wires have one pair of wires in parallel, the plurality of wires continuously have a first portion and a second portion in which the total sum of a line width of one wire of one pair of wires and an interval between one pair of wires is smaller than that of the first portion, and a thickness T1 of the first portion is large with respect to a thickness T2 of the second portion.