Abstract:
An apparatus includes a first amplification stage configured to amplify a first carrier signal and a second amplification stage configured to amplify a second carrier signal. The first amplification stage is direct-current (DC) coupled to the second amplification stage. First circuitry is coupled to the first amplification stage and configured to control a first gain of the first amplification stage. The first circuitry includes a first gain control transistor configured to selectively divert a first bleed current from a first output of the first amplification stage. Second circuitry is coupled to the second amplification stage and configured to control a second gain of the second amplification stage independently of the first gain. The second circuitry includes a second gain control transistor configured to selectively divert a second bleed current from a second output of the second amplification stage.
Abstract:
A device includes an amplifier circuit comprising a plurality of amplification paths, and at least one switchable bypass capacitance coupled to an associated shared power distribution network, the at least one switchable bypass capacitance and at least one of the plurality of amplification paths responsive to a control signal configured to selectively ground the at least one switchable bypass capacitance and selectively enable the at least one of the amplification paths based on a selected operating mode.
Abstract:
Techniques for designing baseband processing circuitry for radio IC's. In an aspect, techniques for differential-to-single-ended conversion in a baseband portion of the IC are disclosed to reduce the pin count and package size for RF IC's. In another aspect, the converter includes selectable narrowband and wideband amplifiers, wherein the wideband amplifiers may be implemented using transistor devices having smaller area than corresponding transistor devices of narrowband amplifiers. Further techniques for bypassing one or more elements, and for implementing a low-pass filter of the converter using an R-C filter network, are described.
Abstract:
Amplifiers with boosted or deboosted source degeneration inductance are disclosed. In an exemplary design, an apparatus includes an amplifier circuit and a feedback circuit. The amplifier circuit receives an input signal and provides an output signal and includes a source degeneration inductor. The feedback circuit is coupled between a node of the amplifier circuit and the source degeneration inductor. The feedback circuit provides feedback to vary an input impedance of an amplifier including the amplifier circuit and the feedback circuit. The feedback circuit may be programmable and may be enabled to provide feedback or disabled to provide no feedback. Alternatively, the feedback circuit may always be enabled to provide feedback. In either case, the feedback circuit may have a variable gain to provide a variable input impedance for the amplifier.
Abstract:
Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor.
Abstract:
Techniques for routing and shielding signal lines to improve isolation between the signal lines are disclosed. In an exemplary design, an apparatus includes first, second, and third signal lines and a switch. The first, second, and third signal lines are configurable to carry first, second, and third signals, respectively. The switch is coupled between the second signal line and AC ground and is closed when the second signal line is not carrying the second signal. The second signal line isolates the first and third signal lines when the switch is closed. Adjacent signal lines are not active at the same time. A signal line may include positive and negative signal lines, which may have at least one cross over in order to cancel coupling between the positive and negative signal lines.
Abstract:
Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode.
Abstract:
An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.
Abstract:
An apparatus includes a first amplifier stage configured to amplify a first carrier signal. The apparatus includes a second amplifier stage configured to amplify a second carrier signal. A resistive-capacitive (RC) network is coupled to the first amplifier stage and to the second amplifier stage. The RC network includes a resistive element coupled to a capacitive element.
Abstract:
Techniques for calibrating a receiver based on a local oscillator (LO) signal from another receiver are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes first and second local oscillator (LO) generators. The first LO generator generates a first LO signal used by a first receiver for frequency downconversion. The second LO generator generates a second LO signal used by a second receiver for frequency downconversion in a first operating mode. The second LO signal is used to generate a test signal for the first receiver in a second operating mode. The second LO signal may be provided as the test signal or may be amplitude modulated with a modulating signal to generate the test signal. The test signal may be used to calibrate residual sideband (RSB), second order input intercept point (IIP2), receive path gain, etc.