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    Fabrication method of semiconductor package
    22.
    发明授权
    Fabrication method of semiconductor package 有权
    半导体封装的制造方法

    公开(公告)号：US08895366B2

    公开(公告)日：2014-11-25

    申请号：US14190635

    申请日：2014-02-26

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC: H01L21/44 ,  H01L21/48 ,  H01L21/56 ,  H01L29/06 ,  H01L23/31

    CPC classification number: H01L21/561 ,  H01L23/3128 ,  H01L23/3142 ,  H01L29/0657 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

    Abstract translation: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。

    Method for fabricating electronic package
    23.
    发明授权
    Method for fabricating electronic package 有权

    公开(公告)号：US12176327B2

    公开(公告)日：2024-12-24

    申请号：US18309756

    申请日：2023-04-28

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Kong-Toon Ng ,  Hung-Ho Lee ,  Chee-Key Chung ,  Chang-Fu Lin ,  Chi-Hsin Chiu

    IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

    Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.

    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
    26.
    发明申请
    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20230015721A1

    公开(公告)日：2023-01-19

    申请号：US17411228

    申请日：2021-08-25

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Meng-Huan Chia ,  Yih-Jenn Jiang ,  Chang-Fu Lin ,  Don-Son Jiang

    IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00

    Abstract: An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
    27.
    发明申请
    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220181225A1

    公开(公告)日：2022-06-09

    申请号：US17160720

    申请日：2021-01-28

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Chi-Jen Chen ,  Hsi-Chang Hsu ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Don-Son Jiang

    IPC: H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

    Abstract: An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.

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