摘要:
Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.
摘要:
The invention relates to a fabrication method of a composite metal oxide dielectric film containing at least two metallic elements on a substrate, and a composite metal oxide dielectric film fabricated thereby. The method includes: forming an amorphous film containing at least one of the metallic elements; preparing a hydrothermal solution where a precursor of the remaining element of the metallic elements is mixed; immersing the amorphous film into the hydrothermal solution; and hydrothermally treating the amorphous film so that the remaining one of the metallic elements is synthesized to the amorphous film, thereby forming a crystallized composite metal oxide film.
摘要:
A circuit board includes an active device, a signal pad on a surface of the circuit board, at least one passive device electrically connecting the active device to the signal pad, and at least one test pad on the surface of the circuit board and electrically connected to a connection point between the active device and the at least one passive device. When a first passive device and a second passive device and a first test pad and a second test pad are provided, the first passive device and the second passive device are connected in series between the active device and the signal pad in this order, the first test pad is connected to a connection point between the active device and the first passive device, and the second test pad is connected to a connection point between the first passive device and the second passive device.
摘要:
Disclosed herein is a printed circuit board with an embedded thin-film capacitor, and a method of manufacturing the same.Specifically, the present invention relates to a printed circuit board with an embedded thin-film capacitor, comprising a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode; a metal seed layer formed on the paraelectric film; and an upper electrode formed on the metal seed layer and having a surface roughness (Ra) of more than 300 nm; and a method of manufacturing a printed circuit board with an embedded thin-film capacitor, comprising forming a lower electrode on an insulating substrate; forming an amorphous paraelectric film on the lower electrode, using a low-temperature film formation process; forming a metal seed layer on the paraelectric film; and forming an upper electrode having a surface roughness (Ra) of more than 300 nm on the metal seed layer, using an electroplating method.
摘要:
Disclosed herein is a printed circuit board with an embedded thin-film capacitor, and a method of manufacturing the same.Specifically, the present invention relates to a printed circuit board with an embedded thin-film capacitor, comprising a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode; a metal seed layer formed on the paraelectric film; and an upper electrode formed on the metal seed layer and having a surface roughness (Ra) of more than 300 nm; anda method of manufacturing a printed circuit board with an embedded thin-film capacitor, comprising forming a lower electrode on an insulating substrate; forming an amorphous paraelectric film on the lower electrode, using a low-temperature film formation process; forming a metal seed layer on the paraelectric film; and forming an upper electrode having a surface roughness (Ra) of more than 300 nm on the metal seed layer, using an electroplating method.
摘要:
Disclosed herein is a printed circuit board including an electronic component embedded therein, as the electronic component is supported on the metal layer of core substrate, thus supporting and radiation performances are improved, production costs are reduced, and the manufacturing process is simplified.
摘要:
A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.
摘要:
A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.
摘要:
Disclosed herein is a composite dielectric composition having a small variation of capacitance with temperature, comprising a combination of a polymer matrix exhibiting a positive or negative variation of capacitance with temperature and a ceramic filler exhibiting a negative or positive variation of capacitance with temperature which is reciprocal to that of the polymer matrix; and a signal-matching embedded capacitor prepared by using the same composition. Particularly, the present invention provides a composite dielectric composition comprising a polymer matrix exhibiting a positive or negative variation of capacitance with temperature and a ceramic filler exhibiting a variation of capacitance which is reciprocal to that of the polymer matrix; and a signal-matching embedded capacitor formed of the same composition and having a variation of capacitance with temperature, ΔC/C×100(%), of not more than 5%. The composite dielectric composition of the present invention can be used in preparation of the signal-matching embedded capacitor due to a small variation of capacitance with temperature.
摘要翻译:本文公开了一种具有小的电容变化与温度的复合电介质组合物,其包括表现出电容与温度的正或负变化的聚合物基体和陶瓷填料的组合,所述陶瓷填料表现出与温度成反比的电容的负或正变化 与聚合物基体的相同; 以及通过使用相同组成制备的信号匹配嵌入式电容器。 特别地,本发明提供一种复合电介质组合物,其包含显示电容与温度的正或负变化的聚合物基质和表现出与聚合物基体相反的电容变化的陶瓷填料; 以及具有相同组成并且具有不大于5%的电容与温度变化的信号匹配嵌入式电容器,并且Dgr; C / C×100(%)。 本发明的复合电介质组合物由于电容随温度的变化小而可用于制备信号匹配嵌入式电容器。
摘要:
Disclosed herein is a printed circuit board with an embedded thin-film capacitor, and a method of manufacturing the same.Specifically, the present invention relates to a printed circuit board with an embedded thin-film capacitor, comprising a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode; a metal seed layer formed on the paraelectric film; and an upper electrode formed on the metal seed layer and having a surface roughness (Ra) of more than 300 nm; anda method of manufacturing a printed circuit board with an embedded thin-film capacitor, comprising forming a lower electrode on an insulating substrate; forming an amorphous paraelectric film on the lower electrode, using a low-temperature film formation process; forming a metal seed layer on the paraelectric film; and forming an upper electrode having a surface roughness (Ra) of more than 300 nm on the metal seed layer, using an electroplating method.