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公开(公告)号:US11114339B2
公开(公告)日:2021-09-07
申请号:US16686682
申请日:2019-11-18
Inventor: Ling-Fu Nieh , Chun-Wei Hsu , Pinlei Edmund Chu , Chi-Jen Liu , Liang-Guang Chen , Yi-Sheng Lin
IPC: H01L21/768 , H01L29/78 , H01L21/321 , H01L21/8238 , H01L23/485 , H01L29/08 , C09G1/02 , H01L21/02 , H01L29/417 , H01L21/8234
Abstract: A method of manufacturing a device includes exposing at least one of a source/drain contact plug or a gate contact plug to a metal ion source solution during a manufacturing process, wherein a constituent metal of a metal ion in the metal ion source solution and the at least one source/drain contact plug or gate contact plug is the same. If the source/drain contact plug or the gate contact plug is formed of cobalt, the metal ion source solution includes a cobalt ion source solution. If the source/drain contact plug or the gate contact plug is formed of tungsten, the metal ion source solution includes a tungsten ion source solution.
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公开(公告)号:US20190161711A1
公开(公告)日:2019-05-30
申请号:US16152965
申请日:2018-10-05
Inventor: Pinlei Edmund Chu , Chun-Wei Hsu , Ling-Fu Nieh , Chi-Jen Liu , Liang-Guang Chen , Yi-Sheng Lin
Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
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公开(公告)号:US09633832B2
公开(公告)日:2017-04-25
申请号:US15049420
申请日:2016-02-22
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/3205 , H01L21/4763 , H01L21/02 , H01L21/28 , H01L21/311 , H01L21/768 , H01L29/40 , H01L29/66
CPC classification number: H01L21/02068 , H01L21/02063 , H01L21/0234 , H01L21/28079 , H01L21/28132 , H01L21/288 , H01L21/31105 , H01L21/31111 , H01L21/31116 , H01L21/76804 , H01L21/76814 , H01L21/76831 , H01L21/76877 , H01L21/76895 , H01L29/401 , H01L29/66545
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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公开(公告)号:US09564511B2
公开(公告)日:2017-02-07
申请号:US14937301
申请日:2015-11-10
Inventor: Chi-Jen Liu , Li-Chieh Wu , Liang-Guang Chen , Shich-Chang Suen
IPC: H01L21/00 , H01L29/66 , H01L21/02 , H01L21/321 , H01L21/768 , H01L21/28 , H01L29/49 , H01L29/51
CPC classification number: H01L29/66545 , H01L21/02074 , H01L21/28088 , H01L21/28123 , H01L21/3212 , H01L21/76802 , H01L21/76805 , H01L21/76829 , H01L21/76831 , H01L21/76895 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6659
Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.
Abstract translation: 一种方法包括在晶片的表面上形成晶体管的虚拟栅极,去除虚拟栅极,并将金属材料填充到由去除的虚拟栅极留下的沟槽中。 然后对金属材料进行化学机械抛光(CMP),其中金属材料的剩余部分形成晶体管的金属栅极。 在CMP之后,使用包含氯和氧的氧化 - 蚀刻剂在金属栅极的暴露的顶表面上进行处理。
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公开(公告)号:US20150200089A1
公开(公告)日:2015-07-16
申请号:US14152497
申请日:2014-01-10
Inventor: Shich-Chang SUEN , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
CPC classification number: H01L21/02068 , H01L21/02063 , H01L21/0234 , H01L21/28079 , H01L21/28132 , H01L21/288 , H01L21/31105 , H01L21/31111 , H01L21/31116 , H01L21/76804 , H01L21/76814 , H01L21/76831 , H01L21/76877 , H01L21/76895 , H01L29/401 , H01L29/66545
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
Abstract translation: 本公开提供了一种用于形成集成电路(IC)结构的方法。 该方法包括提供金属栅极(MG),形成在MG上的蚀刻停止层(ESL)以及形成在ESL上的电介质层。 该方法还包括蚀刻ESL和介电层以形成沟槽。 暴露在沟槽中的MG的表面被氧化以在MG上形成第一氧化物层。 该方法还包括使用H 3 PO 4溶液去除第一氧化物层。
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公开(公告)号:US11410846B2
公开(公告)日:2022-08-09
申请号:US17094563
申请日:2020-11-10
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/02 , H01L21/28 , H01L21/311 , H01L21/768 , H01L21/288 , H01L29/66
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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公开(公告)号:US20210391208A1
公开(公告)日:2021-12-16
申请号:US16902203
申请日:2020-06-15
Inventor: Ji Cui , Fu-Ming Huang , Ting-Kui Chang , Tang-Kuei Chang , Chun-Chieh Lin , Wei-Wei Liang , Chi-Hsiang Shen , Ting-Hsun Chang , Li-Chieh Wu , Hung Yen , Chi-Jen Liu , Liang-Guang Chen , Kei-Wei Chen
IPC: H01L21/768 , C09G1/02 , C09K3/14
Abstract: A method for CMP includes following operations. A metal layer is received. A CMP slurry composition is provided in a CMP apparatus. The CMP slurry composition includes at least a first oxidizer and a second oxidizer different from each other. The first oxidizer is oxidized to form a peroxidant by the second oxidizer. A portion of the metal layer is oxidized to form a first metal oxide by the peroxidant. The first metal oxide is re-oxidized to form a second metal oxide by the second oxidizer.
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公开(公告)号:US10961487B2
公开(公告)日:2021-03-30
申请号:US16152965
申请日:2018-10-05
Inventor: Pinlei Edmund Chu , Chun-Wei Hsu , Ling-Fu Nieh , Chi-Jen Liu , Liang-Guang Chen , Yi-Sheng Lin
IPC: H01L21/02 , H01L21/302 , B08B1/00 , C11D11/00 , C11D7/26 , H01L21/321
Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
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公开(公告)号:US20210082688A1
公开(公告)日:2021-03-18
申请号:US17094563
申请日:2020-11-10
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/02 , H01L21/28 , H01L21/311 , H01L21/768 , H01L29/40 , H01L21/288
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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公开(公告)号:US10937691B2
公开(公告)日:2021-03-02
申请号:US16559336
申请日:2019-09-03
Inventor: Chia Hsuan Lee , Chun-Wei Hsu , Chia-Wei Ho , Chi-Hsiang Shen , Li-Chieh Wu , Jian-Ci Lin , Chi-Jen Liu , Yi-Sheng Lin , Yang-Chun Cheng , Liang-Guang Chen , Kuo-Hsiu Wei , Kei-Wei Chen
IPC: H01L21/02 , H01L21/768 , H01L21/3105 , C09G1/02
Abstract: Methods of forming a slurry and methods of performing a chemical mechanical polishing (CMP) process utilized in manufacturing semiconductor devices, as described herein, may be performed on semiconductor devices including integrated contact structures with ruthenium (Ru) plug contacts down to a semiconductor substrate. The slurry may be formed by mixing a first abrasive, a second abrasive, and a reactant with a solvent. The first abrasive may include a first particulate including titanium dioxide (TiO2) particles and the second abrasive may include a second particulate that is different from the first particulate. The slurry may be used in a CMP process for removing ruthenium (Ru) materials and dielectric materials from a surface of a workpiece resulting in better WiD loading and planarization of the surface for a flat profile.
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