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    STACKED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
    21.
    发明申请
    STACKED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME 有权
    堆叠半导体结构及其形成方法

    公开(公告)号：US20150251895A1

    公开(公告)日：2015-09-10

    申请号：US13916148

    申请日：2013-06-12

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Hua Chu ,  Chun-Wen Cheng

    IPC: B81B7/00 ,  B81C1/00

    CPC classification number: B81C1/00238 ,  B81C2203/0792

    Abstract: A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.

    Abstract translation: 叠层半导体结构包括第一衬底。 多层互连设置在第一衬底上。 金属部分设置在多层互连上。 第一粘合特征在金属部分之上。 第二基板具有前表面。 腔从前表面延伸到第二衬底中的深度D. 可移动结构设置在第二基板的前表面上并且悬挂在空腔上。 可移动结构包括电介质膜，电介质膜上的金属单元和金属单元上的盖电介质层。 第二接合特征在帽电介质层之上并且结合到第一接合特征。 第二结合特征延伸穿过盖电介质层并且电耦合到金属单元。

    Methods and apparatus for MEMS devices with increased sensitivity
    23.
    发明授权
    Methods and apparatus for MEMS devices with increased sensitivity 有权
    具有灵敏度增加的MEMS器件的方法和装置

    公开(公告)号：US09096420B2

    公开(公告)日：2015-08-04

    申请号：US13790617

    申请日：2013-03-08

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Hua Chu ,  Chun-Wen Cheng

    IPC: H01L27/14 ,  B81B3/00 ,  B81C1/00

    CPC classification number: B81B3/0059 ,  B81B3/0056 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0118 ,  B81C1/00158 ,  B81C1/00714 ,  B81C2201/0112 ,  B81C2201/0132 ,  G01C19/5719 ,  G01P15/0802 ,  G01P15/125

    Abstract: Methods and apparatus for forming MEMS devices. An apparatus includes at least a portion of a semiconductor substrate having a first thickness and patterned to form a moveable mass; a moving sense electrode forming the first plate of a first capacitance; at least one anchor patterned from the semiconductor substrate and having a portion that forms the second plate of the first capacitance and spaced by a first gap from the first plate; a layer of semiconductor material of a second thickness patterned to form a first electrode forming a first plate of a second capacitance and further patterned to form a second electrode overlying the at least one anchor and forming a second plate spaced by a second gap that is less than the first gap; wherein a total capacitance is formed that is the sum of the first capacitance and the second capacitance. Methods are disclosed.

    Abstract translation: 用于形成MEMS器件的方法和装置。 一种装置包括具有第一厚度的半导体衬底的至少一部分并被图案化以形成可移动质量块; 形成第一电容的第一板的移动感测电极; 所述至少一个锚定体从所述半导体衬底图案化并且具有形成所述第一电容的所述第二板的部分并与所述第一板间隔开第一间隙; 图案化的第二厚度的半导体材料层，以形成形成第二电容的第一板的第一电极，并进一步图案化以形成覆盖至少一个锚的第二电极，并形成间隔第二间隙的第二板，该第二间隔较小 比第一个差距; 其中形成的总电容是第一电容和第二电容之和。 公开了方法。

    MEMS Device with Release Aperture
    24.
    发明申请
    MEMS Device with Release Aperture 有权
    具有释放孔径的MEMS器件

    公开(公告)号：US20150166334A1

    公开(公告)日：2015-06-18

    申请号：US14613740

    申请日：2015-02-04

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chung-Hsien Lin ,  Chia-Hua Chu ,  Chun-Wen Cheng

    IPC: B81B7/00

    CPC classification number: B81B7/0058 ,  B81C1/00333 ,  B81C1/0038 ,  B81C2203/0136 ,  B81C2203/0145 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present disclosure provides a micro-electro-mechanical systems (MEMS) device. In an embodiment, a device includes a substrate; a MEMS structure disposed above a sacrificial layer opening above the substrate; a release aperture disposed at substantially a same level above the sacrificial layer opening as the MEMS structure; a first cap over the MEMS structure and the sacrificial layer opening, a leg of the first cap disposed between the MEMS structure and the release aperture; and a second cap plugging the release aperture.

    Abstract translation: 本公开提供了一种微机电系统（MEMS）装置。 在一个实施例中，装置包括基板; 设置在所述衬底上方的牺牲层开口上方的MEMS结构; 释放孔，设置在与所述MEMS结构相似的牺牲层开口上方的基本相同的水平处; MEMS结构和牺牲层开口上的第一盖，设置在MEMS结构和释放孔之间的第一盖的腿; 以及封闭释放孔的第二帽。

    METHOD FOR FORMING BIOCHIPS AND BIOCHIPS WITH NON-ORGANIC LANDINGS FOR IMPROVED THERMAL BUDGET
    27.
    发明申请
    METHOD FOR FORMING BIOCHIPS AND BIOCHIPS WITH NON-ORGANIC LANDINGS FOR IMPROVED THERMAL BUDGET 有权
    用于改善热量预算的生物化学和生物化学方法与非有机土地的形成

    公开(公告)号：US20140273281A1

    公开(公告)日：2014-09-18

    申请号：US13801182

    申请日：2013-03-13

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Chia-Hua Chu ,  Allen Timothy Chang ,  Ching-Ray Chen ,  Yi-Hsien Chang ,  Yi-Shao Liu ,  Chun-Ren Cheng ,  Chun-Wen Cheng

    IPC: G01N33/543

    CPC classification number: G01N33/54386 ,  H01L21/00 ,  H01L2224/18

    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.

    Abstract translation: 本公开提供了生物芯片和制造生物芯片的方法。 该方法包括组合三个部分：透明衬底，其中具有微流体通道的第一衬底和第二衬底。 用于入口和出口的通孔形成在透明基板或第二基板中。 在组合之前，在第一基板和第二基板上形成具有用于附着生物材料的支撑介质的各种非有机着陆。 在其他实施例中，微流体通道由透明基板和第二基板之间的粘合层形成，在基板上具有着陆。

    MEMS STRUCTURE WITH ADAPTABLE INTER-SUBSTRATE BOND
    29.
    发明申请
    MEMS STRUCTURE WITH ADAPTABLE INTER-SUBSTRATE BOND 有权
    具有适应性基底结构的MEMS结构

    公开(公告)号：US20140151821A1

    公开(公告)日：2014-06-05

    申请号：US13691281

    申请日：2012-11-30

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Kai-Chih Liang ,  Jiou-Kang Lee ,  Chung-Hsien Lin ,  Te-Hao Lee ,  Chia-Hua Chu

    IPC: H01L29/84

    CPC classification number: B81B3/0078 ,  B81B3/0021 ,  B81B2203/01 ,  B81B2203/0118 ,  B81B2207/09 ,  B81C1/00182 ,  H01L29/84

    Abstract: A MEMS structure incorporating multiple joined substrates and a method for forming the MEMS structure are disclosed. An exemplary MEMS structure includes a first substrate having a bottom surface and a second substrate having a top surface substantially parallel to the bottom surface of the first substrate. The bottom surface of the first substrate is connected to the top surface of the second substrate by an anchor, such that the anchor does not extend through either the bottom surface of the first substrate or the top surface of the second substrate. The MEMS structure may include a bonding layer in contact with the bottom surface of the first substrate, and shaped to at least partially envelop the anchor.

    Abstract translation: 公开了一种结合多个接合的基板的MEMS结构和用于形成MEMS结构的方法。 示例性MEMS结构包括具有底表面的第一基底和具有基本上平行于第一基底的底表面的顶表面的第二基底。 第一基板的底表面通过锚固件连接到第二基板的顶表面，使得锚固件不延伸穿过第一基板的底表面或第二基板的顶表面。 MEMS结构可以包括与第一基板的底表面接触的结合层，并且成形为至少部分地包围锚固件。

    Wafer level packaging
    30.
    发明授权
    Wafer level packaging 有权

    公开(公告)号：US08629517B2

    公开(公告)日：2014-01-14

    申请号：US13710396

    申请日：2012-12-10

    Applicant: Taiwan Semiconductor Manufacturing Company, LTD

    Inventor： Chun-Wen Cheng ,  Chung-Hsien Lin ,  Chia-Hua Chu

    IPC: H01L29/84

    CPC classification number: B81B7/0032 ,  B81C1/00269 ,  B81C1/00333

    Abstract: A method of wafer level packaging includes providing a substrate including a buried oxide layer and a top oxide layer, and etching the substrate to form openings above the buried oxide layer and a micro-electro-mechanical systems (MEMS) resonator element between the openings, the MEMS resonator element enclosed within the buried oxide layer, the top oxide layer, and sidewall oxide layers. The method further includes filling the openings with polysilicon to form polysilicon electrodes adjacent the MEMS resonator element, removing the top oxide layer and the sidewall oxide layers adjacent the MEMS resonator element, bonding the polysilicon electrodes to one of a complementary metal-oxide semiconductor (CMOS) wafer or a carrier wafer, removing the buried oxide layer adjacent the MEMS resonator element, and bonding the substrate to a capping wafer to seal the MEMS resonator element between the capping wafer and one of the CMOS wafer or the carrier wafer.

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