公开(公告)号：US20060068097A1

公开(公告)日：2006-03-30

申请号：US10711717

申请日：2004-09-30

申请人： Hideaki Yamasaki ,  Kazuhito Nakamura ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Paul Jamison

发明人： Hideaki Yamasaki ,  Kazuhito Nakamura ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Paul Jamison

IPC分类号： C23C16/00

CPC分类号： H01L21/28556 ,  C23C16/16 ,  H01L21/28079 ,  H01L21/28247 ,  H01L21/76843 ,  H01L21/7685 ,  H01L21/76856 ,  H01L29/517

摘要： A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.

摘要翻译： 用于形成钝化金属层的方法，其在随后暴露于含氧环境期间保持下面的金属层的性质和形态。 该方法包括在处理室中提供衬底，将衬底暴露于含有铼 - 羰基前体的工艺气体，以在化学气相沉积工艺中在衬底上沉积铼金属层，以及在铼金属层上形成钝化层 从而抑制铼金属表面上含铼结核的氧诱导生长。

公开(公告)号：US20050235918A1

公开(公告)日：2005-10-27

申请号：US10524215

申请日：2003-08-20

申请人： Yasuhiko Kojima ,  Tadahiro Ishizaka ,  Yumiko Kawano

发明人： Yasuhiko Kojima ,  Tadahiro Ishizaka ,  Yumiko Kawano

IPC分类号： F25D9/00 ,  C23C16/44 ,  C23C16/458 ,  C23C16/46 ,  H01L21/00 ,  H01L21/205 ,  H01L21/285 ,  C23C16/00

CPC分类号： C23C16/4409 ,  C23C16/4586 ,  C23C16/463 ,  H01L21/67109 ,  H01L21/67126

摘要： A substrate treating apparatus comprising a treatment chamber for housing a substrate, a stage on which the substrate is placed within the treatment chamber, a heating member arranged within the stage and used for heating the substrate, a sealing member arranged between the stage and the treatment chamber, and a cooling mechanism having a cooling medium, whose latent heat of vaporization is utilized for cooling the sealing member.

摘要翻译： 一种基板处理装置，包括：用于容纳基板的处理室;基板被放置在处理室内的阶段;布置在所述台内并用于加热所述基板的加热构件;布置在所述台与处理之间的密封构件 以及具有冷却介质的冷却机构，其利用蒸发潜热来冷却密封部件。

公开(公告)号：US06924223B2

公开(公告)日：2005-08-02

申请号：US10673646

申请日：2003-09-30

申请人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Mitsuhiro Tachibana ,  Koumei Matsuzava ,  Yumiko Kawano ,  Gert J Leusink ,  Fenton R McFeely ,  Sandra G. Malhotra ,  Andrew H Simon ,  John J Yurkas

发明人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Mitsuhiro Tachibana ,  Koumei Matsuzava ,  Yumiko Kawano ,  Gert J Leusink ,  Fenton R McFeely ,  Sandra G. Malhotra ,  Andrew H Simon ,  John J Yurkas

IPC分类号： C23C16/04 ,  C23C16/16 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768 ,  H01L21/44

CPC分类号： C23C16/45523 ,  C23C16/045 ,  C23C16/16 ,  C23C16/4408 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877

摘要： A method is provided for forming a metal layer on a substrate using an intermittent precursor gas flow process. The method includes exposing the substrate to a reducing gas while exposing the substrate to pulses of a metal-carbonyl precursor gas. The process is carried out until a metal layer with desired thickness is formed on the substrate. The metal layer can be formed on a substrate, or alternately, the metal layer can be formed on a metal nucleation layer.

摘要翻译： 提供了一种使用间歇式前体气体流动方法在基板上形成金属层的方法。 该方法包括将衬底暴露于还原气体，同时将衬底暴露于羰基金属前体气体的脉冲。 进行该过程，直到在基底上形成具有所需厚度的金属层。 金属层可以形成在基板上，或者可以在金属成核层上形成金属层。

公开(公告)号：US20050079708A1

公开(公告)日：2005-04-14

申请号：US10673648

申请日：2003-09-30

申请人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Masahito Sugiura ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Sandra Malhotra

发明人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Masahito Sugiura ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Sandra Malhotra

IPC分类号： C23C16/16 ,  H01L21/285 ,  H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76843 ,  C23C16/16 ,  H01L21/28556 ,  H01L21/76841

摘要： A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process. The TCVD process utilizes high flow rate of a dilute process gas containing a metal-carbonyl precursor to deposit a metal layer. In one embodiment of the invention, the metal-carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12. In another embodiment of the invention, a method is provided for depositing a W layer from a process gas comprising a W(CO)6 precursor at a substrate temperature of about 410° C. and a chamber pressure of about 200 mTorr.

摘要翻译： 一种通过热化学气相沉积（TCVD）工艺在半导体衬底上沉积金属层的方法。 TCVD工艺利用含有羰基金属前体的稀释工艺气体的高流速来沉积金属层。 在本发明的一个实施方案中，羰基金属前体可以选自W（CO）6，Ni（CO）4，Mo（CO）6，Co 2（CO）8，Rh 4（CO）12， Re 2（CO）10，Cr（CO）6和Ru 3（CO）12）。 在本发明的另一个实施方案中，提供了一种方法，用于在约410℃的基底温度和约200mTorr的室压下从包含W（CO）6前体的工艺气体中沉积W层。

公开(公告)号：US20050069632A1

公开(公告)日：2005-03-31

申请号：US10673646

申请日：2003-09-30

申请人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Mitsuhiro Tachibana ,  Koumei Matsuzava ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Sandra Malhotra ,  Andrew Simon ,  John Yurkas

发明人： Hideaki Yamasaki ,  Tsukasa Matsuda ,  Atsushi Gomi ,  Tatsuo Hatano ,  Mitsuhiro Tachibana ,  Koumei Matsuzava ,  Yumiko Kawano ,  Gert Leusink ,  Fenton McFeely ,  Sandra Malhotra ,  Andrew Simon ,  John Yurkas

IPC分类号： C23C16/04 ,  C23C16/16 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768 ,  B05D5/12 ,  H01L21/4763

CPC分类号： C23C16/45523 ,  C23C16/045 ,  C23C16/16 ,  C23C16/4408 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877

摘要： A method is provided for forming a metal layer on a substrate using an intermittent precursor gas flow process. The method includes exposing the substrate to a reducing gas while exposing the substrate to pulses of a metal-carbonyl precursor gas. The process is carried out until a metal layer with desired thickness is formed on the substrate. The metal layer can be formed on a substrate, or alternately, the metal layer can be formed on a metal nucleation layer.

公开(公告)号：US20050020065A1

公开(公告)日：2005-01-27

申请号：US10917334

申请日：2004-08-13

申请人： Yukihiro Shimogaki ,  Yumiko Kawano

发明人： Yukihiro Shimogaki ,  Yumiko Kawano

IPC分类号： C23C16/42 ,  C23C16/34 ,  H01L21/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/00 ,  H01L21/44 ,  H01L21/4763

CPC分类号： H01L28/75 ,  C23C16/34 ,  C23C16/45523 ,  H01L21/28556

摘要： A CVD process of forming a conductive film containing Ti, Si and N includes a first step of supplying gaseous sources of Ti, Si and N simultaneously to grow a conductive film and a second step of supplying the gaseous sources of Ti, Si and N in a state that a flow rate of the gaseous source of Ti is reduced, to grow the conductive film further, wherein the first step and the second step are conducted alternately.

摘要翻译： 形成含有Ti，Si和N的导电膜的CVD工艺包括：第一步，同时供给Ti，Si和N的气体源，以生长导电膜;第二步骤，将Ti，Si和N的气态源 使Ti的气体源的流量降低的状态，进一步使导电膜生长，其中第一步骤和第二步骤交替进行。

公开(公告)号：US06210486B1

公开(公告)日：2001-04-03

申请号：US09499675

申请日：2000-02-08

申请人： Masami Mizukami ,  Takashi Mochizuki ,  Yumiko Kawano

发明人： Masami Mizukami ,  Takashi Mochizuki ,  Yumiko Kawano

IPC分类号： C23C1600

CPC分类号： C23C16/45521 ,  C23C16/455 ,  C23C16/4585

摘要： A CVD film forming apparatus includes a susceptor, provided in a process chamber, having a surface of an area smaller than that of a wafer. A process gas is supplied to a top surface of the wafer mounted on the susceptor, thereby forming a CVD film on the top surface. A film formation preventing gas is supplied in a direction from the rear surface of the wafer toward a peripheral edge thereof at a flow rate which prevents the process gas from flowing to the rear surface of the wafer.

摘要翻译： CVD膜形成装置包括设置在处理室中的基座，其表面的面积小于晶片的表面。 将工艺气体供给到安装在基座上的晶片的顶面，从而在上表面形成CVD膜。 从晶片的后表面朝向其周边的方向以防止处理气体流向晶片背面的流量供给成膜防止气体。

公开(公告)号：US6066558A

公开(公告)日：2000-05-23

申请号：US796695

申请日：1997-03-04

申请人： Yumiko Kawano ,  Shigetoshi Hosaka ,  Yuichi Wada ,  Hiroshi Kobayashi ,  Tetsuya Yano

发明人： Yumiko Kawano ,  Shigetoshi Hosaka ,  Yuichi Wada ,  Hiroshi Kobayashi ,  Tetsuya Yano

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/7685 ,  H01L21/2855 ,  H01L21/76847 ,  H01L21/76879 ,  H01L21/76882

摘要： The multilevel interconnection forming method of the present invention comprises the following. A metal film containing aluminum is deposited on an insulating film of a substrate, and the metal film is patterned, to form a wiring layer of a first layer. An interlayer dielectric film forming part of the first layer is formed on an entire surface of the substrate, such that the interlayer dielectric film covers the wiring layer from upside. A hole is formed at a predetermined position of the interlayer dielectric film such that the hole reaches the wiring layer of the first layer. Aluminum is selectively deposited and filled into the hole by a CVD method, such that the aluminum is filled at a volume ratio smaller than 100% with respect to the hole. An active metal film is formed on an entire upper surface of an interlayer dielectric film including the hole filled with the aluminum. A metal layer containing aluminum is formed on the active metal film. The metal layer is made to flow into the hole by reflowing, to completely fill the hole and to planarize the surface of the metal layer. The metal layer is subjected to be patterned, to form a wiring layer of a second layer, after the surface of the metal layer is planarized by the reflowing.

摘要翻译： 本发明的多层互连形成方法包括以下。 在基板的绝缘膜上沉积含有铝的金属膜，对金属膜进行图案化，形成第一层的布线层。 形成第一层的一部分的层间电介质膜形成在基板的整个表面上，使得层间电介质膜从上方覆盖布线层。 在层间电介质膜的预定位置形成孔，使得孔到达第一层的布线层。 选择性地沉积铝并通过CVD法填充到孔中，使得以相对于孔相对于小于100％的体积比填充铝。 在包括填充有铝的孔的层间绝缘膜的整个上表面上形成活性金属膜。 在活性金属膜上形成含有铝的金属层。 通过回流使金属层流入孔中，以完全填充孔并使金属层的表面平坦化。 在通过回流使金属层的表面平坦化之后，对金属层进行图案化，形成第二层的布线层。

公开(公告)号：US5952723A

公开(公告)日：1999-09-14

申请号：US827411

申请日：1997-03-27

申请人： Nobuyuki Takeyasu ,  Hiroshi Yamamoto ,  Yumiko Kawano ,  Eiichi Kondoh ,  Tomoharu Katagiri ,  Tomohiro Ohta

发明人： Nobuyuki Takeyasu ,  Hiroshi Yamamoto ,  Yumiko Kawano ,  Eiichi Kondoh ,  Tomoharu Katagiri ,  Tomohiro Ohta

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48

CPC分类号： H01L23/53223 ,  H01L21/76802 ,  H01L21/76879 ,  H01L23/5226 ,  H01L2924/0002

摘要： A semiconductor device has a multilevel interconnection structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and at least one via hole. The via plug partially fills the via hole, and the upper surface of the via plug may have a convex shape or a surface of the lower wiring layer at a bottom of the via hole may have a concave shape. Where two via holes are present, one via plug substantially fills the shallowest via hole, and partially fills the deepest via hole. The upper wiring layer may be formed over the via plug to fill a remaining portion of the via hole not filled by the via plug.

摘要翻译： 半导体器件具有多层互连结构，其包括形成在下布线层，半导体衬底和至少一个通孔上的绝缘夹层。 通孔插头部分地填充通孔，并且通孔插塞的上表面可以具有凸形形状，或者在通孔的底部的下布线层的表面可以具有凹形。 当存在两个通孔时，一个通孔插塞基本上填满最浅的通孔，并且部分填充最深的通孔。 上部布线层可以形成在通孔塞上，以填充未由通孔插塞填充的通孔的剩余部分。

公开(公告)号：US08372688B2

公开(公告)日：2013-02-12

申请号：US13376749

申请日：2010-06-02

申请人： Yumiko Kawano ,  Susumu Arima

发明人： Yumiko Kawano ,  Susumu Arima

IPC分类号： H01L21/06

CPC分类号： H01L45/06 ,  C23C16/02 ,  C23C16/305 ,  C23C16/4405 ,  H01L45/144 ,  H01L45/1616

摘要： A film-forming method includes a preprocessing step (step 1) wherein the inside of a processing chamber is exposed to a gas containing Cl and/or F in a state having no substrate in the processing chamber, and a step (step 2) wherein a substrate is loaded into the processing chamber after the step 1. Then, in a step 3, a gaseous Ge raw material, a gaseous Sb raw material, and a gaseous Te raw material are introduced into the processing chamber having the substrate loaded therein, and a Ge—Sb—Te film formed of Ge2Sb2Te5 is formed on the substrate by CVD.

摘要翻译： 成膜方法包括在处理室内没有基板的状态下将处理室的内部暴露于含有Cl和/或F的气体的预处理步骤（步骤1）和步骤（步骤2），其中 在步骤1之后将基板装载到处理室中。然后，在步骤3中，将气态Ge原料，气态Sb原料和气态Te原料引入到其中装载有基板的处理室中， 并且通过CVD在基板上形成由Ge 2 Sb 2 Te 5形成的Ge-Sb-Te膜。