公开(公告)号：US20170256301A1

公开(公告)日：2017-09-07

申请号：US15462077

申请日：2017-03-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: G11C11/404 ,  H01L21/84 ,  H01L27/12 ,  H01L49/02 ,  H01L27/108 ,  G11C11/408 ,  H01L27/06

CPC classification number: G11C11/404 ,  G11C11/4085 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/10873 ,  H01L27/10891 ,  H01L27/10897 ,  H01L27/1207 ,  H01L28/60

Abstract: To provide a memory device which operates at high speed or a memory device in which the frequency of refresh operations is reduced. In a cell array, a potential is supplied from a driver circuit to a wiring connected to a memory cell. The cell array is provided over the driver circuit. Each of memory cells included in the cell array includes a switching element, and a capacitor in which supply, holding, and discharge of electric charge are controlled by the switching element. Further, a channel formation region of the transistor used as the switching element includes a semiconductor whose band gap is wider than that of silicon and whose intrinsic carrier density is lower than that of silicon.

公开(公告)号：US20170244436A1

公开(公告)日：2017-08-24

申请号：US15251356

申请日：2016-08-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA

IPC: H04B1/16 ,  A61B5/07 ,  H01L23/66 ,  H04B13/00 ,  H01L23/60 ,  H01L27/13

CPC classification number: H04B1/1607 ,  A61B5/0002 ,  A61B5/0031 ,  A61B5/07 ,  A61B5/076 ,  A61B2560/0219 ,  A61B2562/166 ,  G06F19/00 ,  G06F19/3418 ,  G06Q50/22 ,  H01L23/60 ,  H01L23/66 ,  H01L27/13 ,  H01L2223/6677 ,  H04B13/005 ,  H05K1/118 ,  H05K7/00

Abstract: A wireless sensor device capable of constant operation without replacement of batteries. The wireless sensor device is equipped with a rechargeable battery and the battery is recharged wirelessly. Radio waves received at an antenna circuit are converted into electrical energy and stored in the battery. A sensor circuit operates with the electrical energy stored in the battery, and acquires information. Then, a signal containing the information acquired is converted into radio waves at the antenna circuit, whereby the information can be read out wirelessly.

公开(公告)号：US20170200748A1

公开(公告)日：2017-07-13

申请号：US15469888

申请日：2017-03-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: H01L27/12 ,  H03K17/16 ,  G09G3/36 ,  G11C19/18

CPC classification number: H01L27/1255 ,  G09G3/20 ,  G09G3/2092 ,  G09G3/3233 ,  G09G3/3291 ,  G09G3/36 ,  G09G3/3648 ,  G09G2300/0439 ,  G09G2300/08 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/184 ,  G11C19/28 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K17/161 ,  H03K19/00315 ,  H03K19/096

Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

公开(公告)号：US20170162700A1

公开(公告)日：2017-06-08

申请号：US15432977

申请日：2017-02-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Akiharu MIYANAGA ,  Junpei SUGAO ,  Hideki UOCHI ,  Yasuo NAKAMURA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L29/24 ,  H01L29/49

CPC classification number: H01L29/7869 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76838 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606

Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

公开(公告)号：US20170162608A1

公开(公告)日：2017-06-08

申请号：US15435693

申请日：2017-02-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1333

CPC classification number: H01L27/1259 ,  G02F1/133345 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/123 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/1288

Abstract: A display device is manufactured with five photolithography steps: a step of forming a gate electrode, a step of forming a protective layer for reducing damage due to an etching step or the like, a step of forming a source electrode and a drain electrode, a step of forming a contact hole, and a step of forming a pixel electrode. The display device includes a groove portion which is formed in the step of forming the contact hole and separates the semiconductor layer.

公开(公告)号：US20170025448A1

公开(公告)日：2017-01-26

申请号：US15285661

申请日：2016-10-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/786 ,  H01L29/24

CPC classification number: H01L27/1255 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/127 ,  H01L28/20 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/7869

Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

Abstract translation: 通过使用含有氢化合物如硅烷（SiH 4）和氨（NH 3）的气体的等离子体CVD形成的氮化硅层910设置在与用于电阻器354的氧化物半导体层905上并直接接触，并且氮化硅 在用于薄膜晶体管355的氧化物半导体层906上设置层910，氧化硅层909用作阻挡层。 因此，与氧化物半导体层906相比，在氧化物半导体层905中引入更高浓度的氢。结果，使用于电阻器354的氧化物半导体层905的电阻比氧化物半导体层的电阻低 906用于薄膜晶体管355。

公开(公告)号：US20170025440A1

公开(公告)日：2017-01-26

申请号：US15284658

申请日：2016-10-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/124 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2201/123 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869

Abstract: Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four photolithography steps: a step of forming a gate electrode (including a wiring formed using the same layer as the gate electrode), a step of forming source and drain electrodes (including a wiring formed using the same layer as the source and drain electrodes), a step of forming a contact hole (including the removal of an insulating layer and the like in a region other than the contact hole), and a step of forming a pixel electrode (including a wiring formed using the same layer as the pixel electrode). By the reduction in the number of photolithography steps, a liquid crystal display device can be provided at low cost and high productivity. Formation of a parasitic channel is prevented by an improvement in shape and potential of a wiring.

Abstract translation: 省略了用于形成岛状半导体层的光刻和蚀刻步骤，并且制造了具有四个光刻步骤的液晶显示装置：形成栅电极（包括使用与栅电极相同的层形成的布线）的步骤， 形成源极和漏极的步骤（包括使用与源电极和漏电极相同的层形成的布线），形成接触孔（包括在接触以外的区域中除去绝缘层等）的步骤 孔），以及形成像素电极（包括使用与像素电极相同的层形成的布线）的步骤。 通过减少光刻步骤的数量，可以以低成本和高生产率提供液晶显示装置。 通过布线的形状和电位的改善来防止形成寄生通道。

公开(公告)号：US20160379534A1

公开(公告)日：2016-12-29

申请号：US15259360

申请日：2016-09-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: G09G3/00 ,  G09G3/34 ,  G09G3/36 ,  H01L21/477 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  G09G3/20 ,  H04N13/04

CPC classification number: G09G3/003 ,  G02F1/13378 ,  G02F1/134363 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2201/123 ,  G09G3/2003 ,  G09G3/3406 ,  G09G3/3413 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0235 ,  G09G2310/0237 ,  G09G2310/08 ,  G09G2320/0646 ,  G09G2330/021 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/7869 ,  H01L29/78696 ,  H04N13/324 ,  H04N13/341 ,  H04N13/344 ,  H04N13/398

Abstract: It is an object to provide a specific driving method for reduction in power consumption in displaying a 3D image with field sequential driving. A driving method of a liquid crystal display device is a method in which a stereoscopic image can be perceived with a liquid crystal display device switching an image for a left eye and an image for a right eye to display the image for the left eye or the image for the right eye, and a pair of glasses having a switching means with which the image for the right eye and the image for the left eye are switched in synchronization with display of the image for the left eye or the image for the right eye in order that the left or right eye of a viewer may selectively perceive the image for the left eye or the image for the right eye; the image for the left eye and the image for the right eye are perceived by the left eye or right eye in a mixed color by switching light which is emitted from a backlight portion and which corresponds to a plurality of colors, within a predetermined period, and the light which is emitted from the backlight portion are continuously emitted in accordance with an image signal of each of a plurality of colors which forms the linage for the left eye and the image for the right eye.

Abstract translation: 本发明的目的是提供一种用于在通过场顺序驱动显示3D图像时降低功耗的特定驱动方法。 液晶显示装置的驱动方法是可以用切换左眼图像的液晶显示装置和右眼图像显示立体图像来显示左眼图像或 用于右眼的图像和具有用于右眼图像和左眼图像与左眼图像或右眼图像的显示同步地切换的切换装置的一对眼镜 以便观看者的左眼或右眼可以选择性地感知左眼的图像或右眼的图像; 在预定时间段内，通过从背光源部分发射并对应于多种颜色的光来切换左眼或右眼的左眼图像和右眼图像以混合颜色感知， 并且根据形成左眼的线条和右眼的图像的多种颜色中的每一种的图像信号，连续发射从背光部分发射的光。

公开(公告)号：US20160365359A1

公开(公告)日：2016-12-15

申请号：US15239006

申请日：2016-08-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: H01L27/12 ,  G09G3/3233 ,  G09G3/3258 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1334 ,  G02F1/1337 ,  G02F1/1362 ,  H01L29/786 ,  G09G3/36

CPC classification number: H01L27/124 ,  G02F1/1334 ,  G02F1/1337 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0626 ,  G09G2330/021 ,  G11C19/28 ,  G11C19/287 ,  H01L27/1225 ,  H01L29/7869

Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.

公开(公告)号：US20160293129A1

公开(公告)日：2016-10-06

申请号：US15175189

申请日：2016-06-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Atsushi UMEZAKI

IPC: G09G3/36 ,  H01L29/786 ,  H03K19/00 ,  H03K17/687 ,  H03K19/0185 ,  H01L27/12 ,  H01L27/02

CPC classification number: G09G3/3677 ,  G09G2310/0251 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2330/021 ,  G11C19/00 ,  H01L27/0207 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K17/687 ,  H03K19/0013 ,  H03K19/018557 ,  H03K19/018571

Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.