公开(公告)号：US08134190B2

公开(公告)日：2012-03-13

申请号：US12390836

申请日：2009-02-23

申请人： Akira Okita ,  Masanori Ogura ,  Seiichiro Sakai ,  Takanori Watanabe

发明人： Akira Okita ,  Masanori Ogura ,  Seiichiro Sakai ,  Takanori Watanabe

IPC分类号： H01L27/146

CPC分类号： H01L27/14603 ,  H01L27/1463 ,  H01L27/14641

摘要： To provide a solid-state image pickup apparatus with little or no difference in the dark currents between adjacent photoelectric conversion elements and providing a high sensitivity and a low dark current even in a high-speed readout operation.A well 302 is formed on a wafer 301, and semiconductor layers 101a, 101b are formed in the well to constitute photodiodes. A well contact 306 is formed between the semiconductor layers 101a, 101b. Element isolation regions 303b, 303a are provided between the well contact and the semiconductor layers, and channel stop layers 307b, 307a are provided under the element isolation regions 303b, 303a. A conductive layer 304 is provided on the element isolation region 303b, and a side wall 308 is provided on a side face of the conductive layer 304. A distance a between an end of the element isolation region 303b and the conductive layer 304, a width b of the side wall 308 and a device isolation width c satisfy a relation c>a≧b.

摘要翻译： 为了提供即使在高速读出操作中，相邻的光电转换元件之间的暗电流几乎或没有差异，并且提供高灵敏度和低暗电流的固态图像拾取装置。 阱302形成在晶片301上，半导体层101a，101b形成在阱中以构成光电二极管。 在半导体层101a，101b之间形成阱接触306。 元件隔离区域303b，303a设置在阱接触件和半导体层之间，并且通道阻挡层307b，307a设置在元件隔离区域303b，303a的下方。 导电层304设置在元件隔离区域303b上，侧壁308设置在导电层304的侧面上。元件隔离区域303b的一端与导电层304之间的距离a，宽度 侧壁308的b和装置隔离宽度c满足关系c>a≥b。

公开(公告)号：US20110242387A1

公开(公告)日：2011-10-06

申请号：US13132968

申请日：2010-01-26

申请人： Takanori Watanabe

发明人： Takanori Watanabe

IPC分类号： H04N5/335 ,  H01L31/02

CPC分类号： H01L27/1463 ,  H01L27/1464 ,  H01L27/14689

摘要： A photoelectric conversion apparatus (100) comprises: multiple photoelectric converting units (PD) disposed in a semiconductor substrate; (SB) and isolation portions (103,104,105,106) disposed in the semiconductor substrate. Each photoelectric converting unit includes: a second semiconductor region (107); a third semiconductor region, (109) disposed below the second semiconductor region(107) and a fourth semiconductor region (102) disposed below the third semiconductor region, and each isolation portion includes: a fifth semiconductor region, (104) disposed at a location that is deeper than the surface of the semiconductor substrate and at least extending laterally to the second semiconductor region, containing a first conductivity type impurity; and a sixth semiconductor region,(105) disposed below the fifth semiconductor region and at least extending laterally to the third semiconductor region, containing the first conductivity type impurity, and the diffusion coefficient of the impurity contained in the fifth semiconductor region is lower than the diffusion coefficient of the impurity contained in the sixth semiconductor region.

摘要翻译： 光电转换装置（100）包括：设置在半导体衬底中的多个光电转换单元（PD）; （SB）和设置在半导体衬底中的隔离部分（103,104,105,106）。 每个光电转换单元包括：第二半导体区域（107）; 设置在第二半导体区域（107）下方的第三半导体区域（109）和设置在第三半导体区域下方的第四半导体区域（102），并且每个隔离部分包括：第五半导体区域（104），其设置在位置 其比半导体衬底的表面更深，并且至少横向延伸到包含第一导电类型杂质的第二半导体区域; 以及第六半导体区域（105），其设置在所述第五半导体区域的下方，并且至少横向延伸到所述第三半导体区域，所述第三半导体区域包含所述第一导电型杂质，并且所述第五半导体区域中包含的杂质的扩散系数低于 包含在第六半导体区域中的杂质的扩散系数。

公开(公告)号：US08023025B2

公开(公告)日：2011-09-20

申请号：US11772540

申请日：2007-07-02

申请人： Tetsuya Itano ,  Takanori Watanabe

发明人： Tetsuya Itano ,  Takanori Watanabe

IPC分类号： H04N3/14

CPC分类号： H04N5/335

摘要： A photoelectric conversion apparatus includes photoelectric conversion elements configured to convert incident light to electric carriers, amplifier sections configured to read signals based on the electric carriers generated in the photoelectric conversion elements, transfer sections configured to transfer electric carriers in the photoelectric conversion elements to input units of the amplifier sections, and voltage supply sections configured to set potentials of the input units, arranged in a two-dimensional array. The photoelectric conversion apparatus further includes output lines configured to read signals from the amplifier sections and voltage supply lines configured to supply voltages to the voltage supply sections. Out of the output lines and the voltage supply lines, only one output line and one voltage supply line related to a first photoelectric conversion element are disposed between the first photoelectric conversion element and an adjacent second photoelectric conversion element.

摘要翻译： 光电转换装置包括被配置为将入射光转换为电载体的光电转换元件，被配置为基于在光电转换元件中产生的电载流子读取信号的放大器部分，被配置为将光电转换元件中的载流子转移到输入单元 放大器部分的电压供应部分和被配置为设置为二维阵列的输入单元的电位的电压供应部分。 光电转换装置还包括被配置为从放大器部分读取信号的输出线和被配置为向电压供应部分提供电压的电压供应线。 在输出线和电源线之间，在第一光电转换元件和相邻的第二光电转换元件之间仅设置与第一光电转换元件相关的一条输出线和一条电源线。

公开(公告)号：US07982789B2

公开(公告)日：2011-07-19

申请号：US12168506

申请日：2008-07-07

申请人： Takanori Watanabe ,  Tetsuya Itano ,  Hidekazu Takahashi

发明人： Takanori Watanabe ,  Tetsuya Itano ,  Hidekazu Takahashi

IPC分类号： H04N5/335

CPC分类号： H04N9/045

摘要： Since pixel signals are not only added in the row direction but also averaged in the column direction, it is possible to sufficiently increase the frame rate even when the number of pixels increases. Additionally, since the spatial centers of gravity of the added or averaged signals are arranged at equal intervals in a Bayer array, it is possible to reduce false color (moiré) generation and suppress the decrease in the spatial resolution.

摘要翻译： 由于像素信号不仅在行方向上相加，而且在列方向上被平均化，所以即使像素数增加，也可以充分提高帧速率。 此外，由于相加或平均信号的空间重心在拜耳阵列中以相等的间隔排列，所以可以减少假色（莫尔）的产生并抑制空间分辨率的降低。

公开(公告)号：US07928486B2

公开(公告)日：2011-04-19

申请号：US12642094

申请日：2009-12-18

申请人： Hiroshi Yuzurihara ,  Ryuichi Mishima ,  Takanori Watanabe ,  Takeshi Ichikawa ,  Seiichi Tamura

发明人： Hiroshi Yuzurihara ,  Ryuichi Mishima ,  Takanori Watanabe ,  Takeshi Ichikawa ,  Seiichi Tamura

IPC分类号： H01L31/112

CPC分类号： H01L27/14687 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643

摘要： A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2

摘要翻译： 一种光电转换装置，包括第一导电类型的半导体衬底和具有第一导电类型的杂质区和与第一导电类型相反的第二导电类型的多个杂质区的光电转换元件。 多个第二导电型杂质区域至少包括第一杂质区域，设置在第一杂质区域和衬底表面之间的第二杂质区域和设置在第二杂质区域和第二杂质区域的表面之间的第三杂质区域 底物。 对应于第一杂质区域中的杂质浓度的峰值的浓度C1，与第二杂质区域中的杂质浓度的峰值对应的浓度C2和与第三杂质区域中的杂质浓度的峰值相对应的浓度C3 满足以下关系：C2

公开(公告)号：US07902595B2

公开(公告)日：2011-03-08

申请号：US12308057

申请日：2007-05-31

申请人： Alberto O. Adan ,  Mitsuhiro Kikuta ,  Akinobu Teramoto ,  Tadahiro Ohmi ,  Hiroo Yabe ,  Takanori Watanabe

发明人： Alberto O. Adan ,  Mitsuhiro Kikuta ,  Akinobu Teramoto ,  Tadahiro Ohmi ,  Hiroo Yabe ,  Takanori Watanabe

IPC分类号： H01L29/66 ,  H01L21/8239

CPC分类号： H01L29/7813 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823487 ,  H01L21/823807 ,  H01L21/82385 ,  H01L21/823885 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/045 ,  H01L29/4236 ,  H01L29/66734

摘要： In one embodiment of the present invention, a power IC device is disclosed containing a power MOS transistor with a low ON resistance and a surface channel MOS transistor with a high operation speed. There is also provided a method of manufacturing such a device. A chip has a surface of which the planar direction is not less than −8° and not more than +8° off a silicon crystal face. The p-channel trench power MOS transistor includes a trench formed vertically from the surface of the chip, a gate region in the trench, an inversion channel region on a side wall of the trench, a source region in a surface layer of the chip, and a drain region in a back surface layer of the chip. The surface channel MOS transistor has an inversion channel region fabricated so that an inversion channel current flows in a direction not less than −8° and not more than +8° off the silicon crystal direction.

摘要翻译： 在本发明的一个实施例中，公开了一种功率IC器件，其包含具有低导通电阻的功率MOS晶体管和具有高操作速度的表面沟道MOS晶体管。 还提供了制造这种装置的方法。 芯片的表面的平面方向不小于硅晶面的-8°且不大于+ 8°。 p沟道沟槽功率MOS晶体管包括从芯片的表面垂直形成的沟槽，沟槽中的栅极区域，沟槽的侧壁上的反转沟道区域，芯片的表面层中的源极区域， 以及芯片的背面层中的漏极区域。 表面沟道MOS晶体管具有制造的反向沟道区域，使得反向沟道电流在与硅晶体方向不同于-8°且不超过+ 8°的方向上流动。

公开(公告)号：US20110003426A1

公开(公告)日：2011-01-06

申请号：US12881582

申请日：2010-09-14

申请人： Takanori Watanabe ,  Tetsuya Itano ,  Hidekazu Takahashi ,  Shunsuke Takimoto ,  Kotaro Abukawa ,  Hiroaki Naruse ,  Shigeru Nishimura ,  Masatsugu Itahashi

发明人： Takanori Watanabe ,  Tetsuya Itano ,  Hidekazu Takahashi ,  Shunsuke Takimoto ,  Kotaro Abukawa ,  Hiroaki Naruse ,  Shigeru Nishimura ,  Masatsugu Itahashi

IPC分类号： H01L31/18

CPC分类号： H01L27/14616 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14689

摘要： A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.

摘要翻译： 光电转换装置包括具有多个光电转换元件的光电转换区域和被配置为响应每个光电转换元件的电荷读取信号的第一MOS晶体管; 以及具有第二MOS晶体管的外围电路区域，被配置为驱动第一MOS晶体管和/或放大从光电转换区域读取的信号，光电转换区域和外围电路区域位于同一半导体衬底上，其中杂质 第一MOS晶体管的漏极中的浓度低于第二MOS晶体管的漏极中的杂质浓度。

公开(公告)号：US07800227B2

公开(公告)日：2010-09-21

申请号：US11240645

申请日：2005-10-03

申请人： Masamichi Kamiyama ,  Masashi Takase ,  Takanori Watanabe

发明人： Masamichi Kamiyama ,  Masashi Takase ,  Takanori Watanabe

IPC分类号： H01L23/522

CPC分类号： H01L24/05 ,  H01L23/4824 ,  H01L23/53214 ,  H01L23/53228 ,  H01L24/03 ,  H01L2224/02166 ,  H01L2224/05006 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/00 ,  H01L2224/48

摘要： In a semiconductor device including a multilayer pad, the multilayer pad comprises a first pad layer provided over a semiconductor substrate to have a first copper wiring region and a first intralayer insulating region provided within the first copper wiring region, and a second pad layer provided over the first pad layer via an interlayer insulating film to have a second copper wiring region and a second intralayer insulating region provided within the second copper wiring region. In the semiconductor device, the first copper wiring region, the first intralayer insulating region, the second copper wiring region, and the second intralayer insulating region are provided in the first and second pad layers such that the multilayer pad has a layout in which all the regions are covered with the copper wiring when the multilayer pad is perspectively viewed from a perpendicularly upper direction for the semiconductor substrate.

摘要翻译： 在包括多层衬垫的半导体器件中，多层衬垫包括设置在半导体衬底上的第一衬底层，其具有设置在第一铜布线区域内的第一铜布线区域和第一层间绝缘区域，以及设置在第一铜布线区域上的第二衬垫层 所述第一焊盘层经由层间绝缘膜，以具有设置在所述第二铜布线区域内的第二铜布线区域和第二层间绝缘区域。 在半导体装置中，第一铜布线区域，第一内层绝缘区域，第二铜布线区域和第二层间绝缘区域设置在第一和第二焊盘层中，使得多层焊盘具有布局，其中， 当从半导体衬底的垂直上方观察多层衬垫时，用铜布线覆盖区域。

公开(公告)号：US20100202084A1

公开(公告)日：2010-08-12

申请号：US12572020

申请日：2009-10-01

申请人： Takanori WATANABE ,  Hiroshi IWAI ,  Isamu HASHIMOTO

发明人： Takanori WATANABE ,  Hiroshi IWAI ,  Isamu HASHIMOTO

IPC分类号： G11B17/02

CPC分类号： G11B17/028

摘要： In a brushless motor, the rotational frequency N (Hz) of the hub satisfies N

摘要翻译： 在无刷电动机中，轮毂的旋转频率N（Hz）满足N

公开(公告)号：US20090207292A1

公开(公告)日：2009-08-20

申请号：US12354374

申请日：2009-01-15

申请人： Takanori Watanabe

发明人： Takanori Watanabe

IPC分类号： H04N5/335 ,  H01L33/00

CPC分类号： H04N5/37457 ,  H04N5/365 ,  H04N5/3741

摘要： A solid state imaging apparatus of less fixed pattern noises and less shading comprises an imaging area wherein a plurality of pixel circuits are arranged in two dimensionally, and each of the pixel circuits includes a plurality of photoelectric conversion elements each for generating an electric charge by a photoelectric conversion and for accumulating the electric charge, a single floating diffusion portion for accumulating the charge, a plurality of transfer switches for transferring the electric charges respectively from the plurality of photoelectric conversion elements to the single floating diffusion portion and an amplifying transistor for amplifying a voltage corresponding to the electric charge accumulated by the floating diffusion portion, wherein the plurality of transfer switches transfers the electric charges from the plurality of photoelectric conversion elements sequentially to the floating diffusion portion while maintaining the amplifying transistors at the activation state.

摘要翻译： 具有较少固定图案噪声和较少阴影的固态成像装置包括其中多个像素电路被二维排列的成像区域，并且每个像素电路包括多个光电转换元件，每个用于通过一个 用于累积电荷的单个浮动扩散部分，用于累积电荷的单个浮动扩散部分，用于将电荷分别从多个光电转换元件传送到单个浮动扩散部分的多个转移开关和用于放大电荷的放大晶体管 电压对应于由浮动扩散部分累积的电荷，其中多个转移开关将电荷从多个光电转换元件顺序地转移到浮动扩散部分，同时将放大晶体管保持在激活状态 状态。