公开(公告)号：US09012980B1

公开(公告)日：2015-04-21

申请号：US14096804

申请日：2013-12-04

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Hans Weber ,  Werner Schustereder ,  Wolfgang Jantscher ,  Helmut Strack

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/66 ,  H01L21/265 ,  H01L29/78

CPC classification number: H01L29/0634 ,  H01L21/263 ,  H01L21/324 ,  H01L22/14 ,  H01L22/34 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/32 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/7816 ,  H01L29/7835

Abstract: A method of manufacturing a semiconductor device includes forming a charge compensation device structure in a semiconductor substrate. The method further includes measuring a value of an electric characteristic related to the charge compensation device. At least one of proton irradiation and annealing parameters are adjusted based on the measured value. Based on the at least one of the adjusted proton irradiation and annealing parameters the semiconductor substrate is irradiated with protons, and thereafter, the semiconductor substrate is annealed.

Abstract translation: 一种制造半导体器件的方法包括在半导体衬底中形成电荷补偿器件结构。 该方法还包括测量与电荷补偿装置相关的电特性的值。 基于测量值调整质子照射和退火参数中的至少一个。 基于所调整的质子照射和退火参数中的至少一个，用质子照射半导体衬底，然后对半导体衬底进行退火。

公开(公告)号：US12057316B2

公开(公告)日：2024-08-06

申请号：US17476829

申请日：2021-09-16

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Paul Ellinghaus ,  Axel Koenig ,  Caspar Leendertz ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/265 ,  H01L21/04 ,  H01L29/04 ,  H01L29/16 ,  H01L29/167

CPC classification number: H01L21/047 ,  H01L29/045 ,  H01L29/1608

Abstract: A method includes orienting a silicon carbide layer to a first crystal channel direction relative to a first ion beam and implanting phosphorous into the silicon carbide layer using the first ion beam to define a first doped region in the silicon carbide layer. A deviation angle between the first crystal channel direction and the first ion beam is less than ±1° and the first crystal channel direction comprises a direction or a direction.

公开(公告)号：US20230253454A1

公开(公告)日：2023-08-10

申请号：US18100144

申请日：2023-01-23

Applicant: Infineon Technologies AG

Inventor： Ravi Keshav Joshi ,  Thomas Ralf Siemieniec ,  Werner Schustereder ,  Kristijan Luka Mletschnig ,  Axel König

IPC: H01L29/08 ,  H01L29/16 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

CPC classification number: H01L29/0869 ,  H01L29/1608 ,  H01L29/41741 ,  H01L29/45 ,  H01L29/7813 ,  H01L21/0475 ,  H01L21/0485 ,  H01L29/66068

Abstract: A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.

公开(公告)号：US10903078B2

公开(公告)日：2021-01-26

申请号：US16422659

申请日：2019-05-24

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Alexander Breymesser ,  Guenter Denifl ,  Mihai Draghici ,  Bernhard Goller ,  Tobias Franz Wolfgang Hoechbauer ,  Wolfgang Lehnert ,  Roland Rupp ,  Werner Schustereder

IPC: H01L21/04 ,  H01L29/16 ,  H01L21/265 ,  H01L21/02 ,  H01L21/324

Abstract: A method for processing a silicon carbide wafer includes implanting ions into the silicon carbide wafer to form an absorption layer in the silicon carbide wafer. The absorption coefficient of the absorption layer is at least 100 times the absorption coefficient of silicon carbide material of the silicon carbide wafer outside the absorption layer, for light of a target wavelength. The silicon carbide wafer is split along the absorption layer at least by irradiating the silicon carbide wafer with light of the target wavelength to obtain a silicon carbide device wafer and a remaining silicon carbide wafer.

公开(公告)号：US10192955B2

公开(公告)日：2019-01-29

申请号：US15718189

申请日：2017-09-28

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Moriz Jelinek ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Michael Stadtmueller

IPC: H01L29/06 ,  H01L21/324 ,  H01L21/8234 ,  H01L29/739 ,  H01L21/263 ,  H01L21/265 ,  H01L21/322 ,  H01L29/36 ,  H01L29/861 ,  H01L29/167 ,  H01L21/66

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

公开(公告)号：US20180308698A1

公开(公告)日：2018-10-25

申请号：US15494599

申请日：2017-04-24

Applicant: Infineon Technologies AG

Inventor： Markus Bina ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/261 ,  G21G1/06

CPC classification number: G21G1/06 ,  C30B31/20 ,  G21G4/02 ,  H01L21/261

Abstract: In various embodiments, a method of processing one or more semiconductor wafers is provided. The method includes positioning the one or more semiconductor wafers in an irradiation chamber, generating a neutron flux in a spallation chamber coupled to the irradiation chamber, moderating the neutron flux to produce a thermal neutron flux, and exposing the one or more semiconductor wafers to the thermal neutron flux to thereby induce the creation of dopant atoms in the one or more semiconductor wafers.

公开(公告)号：US10096677B2

公开(公告)日：2018-10-09

申请号：US15178039

申请日：2016-06-09

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Naveen Goud Ganagona ,  Johannes Georg Laven ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/265 ,  H01L29/10 ,  H01L29/66 ,  H01L29/167 ,  H01L29/08 ,  H01L21/263 ,  H01L21/324 ,  H01L21/67 ,  H01L21/66 ,  H01L29/32 ,  H01L29/861

Abstract: A method for forming a semiconductor device includes implanting a predefined dose of protons into a semiconductor substrate. Further, the method comprises controlling a temperature of the semiconductor substrate during the implantation of the predefined dose of protons so that the temperature of the semiconductor substrate is within a target temperature range for more than 70% of an implant process time used for implanting the predefined dose of protons. The target temperature range reaches from a lower target temperature limit to an upper target temperature limit. Further, the lower target temperature limit is equal to a target temperature minus 30° C. and the upper target temperature limit is equal to the target temperature plus 30° C. and the target temperature is higher than 80° C.

公开(公告)号：US20180138266A1

公开(公告)日：2018-05-17

申请号：US15854341

申请日：2017-12-26

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Wolfgang Jantscher ,  Roland Rupp ,  Werner Schustereder ,  Hans Weber

IPC: H01L29/06 ,  H01L21/266 ,  H01L21/04 ,  H01L21/265 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L29/0634 ,  H01L21/046 ,  H01L21/0465 ,  H01L21/26546 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/2003

Abstract: A method of producing a semiconductor device includes providing a semiconductor body including a semiconductor body material having a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon. At least one first semiconductor region doped with dopants of a first conductivity type is produced in the semiconductor body, including by applying a first implantation of first implantation ions. At least one second semiconductor region adjacent to the at least one first semiconductor region and doped with dopants of a second conductivity type complementary to the first conductivity type is produced in the semiconductor body, including by applying a second implantation of second implantation ions.

公开(公告)号：US20180122895A1

公开(公告)日：2018-05-03

申请号：US15793530

申请日：2017-10-25

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Hans Weber ,  Hans-Joachim Schulze ,  Johannes Georg Laven ,  Werner Schustereder

IPC: H01L29/06 ,  H01L21/324 ,  H01L29/36 ,  H01L29/167 ,  H01L29/32 ,  H01L21/225 ,  H01L29/10 ,  H01L29/08 ,  H01L29/872 ,  H01L21/66 ,  H01L21/78 ,  H01L21/265 ,  H01L29/66 ,  H01L21/30 ,  H01L29/78 ,  H01L29/739

CPC classification number: H01L29/0615 ,  H01L21/2253 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/3003 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/78 ,  H01L22/14 ,  H01L22/20 ,  H01L29/0684 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66143 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/739 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7811 ,  H01L29/8611 ,  H01L29/872

Abstract: Crystal lattice defects are generated in a horizontal surface portion of a semiconductor substrate and hydrogen-related donors are formed in the surface portion. Information is obtained about a cumulative dopant concentration of dopants, including the hydrogen-related donors, in the surface portion. Based on the information about the cumulative dopant concentration and a dissociation rate of the hydrogen-related donors, a main temperature profile is determined for dissociating a defined portion of the hydrogen-related donors. The semiconductor substrate is subjected to a main heat treatment applying the main temperature profile to obtain, in the surface portion, a final total dopant concentration deviating from a target dopant concentration by not more than 15%.

公开(公告)号：US09934988B2

公开(公告)日：2018-04-03

申请号：US15379243

申请日：2016-12-14

Applicant: Infineon Technologies AG

Inventor： Werner Schustereder ,  Helmut Oefner ,  Hans-Joachim Schulze ,  Sandeep Walia

IPC: H01L21/322 ,  H01L21/02 ,  H01L21/223 ,  H01L21/306 ,  H01L21/265

CPC classification number: H01L21/3225 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02598 ,  H01L21/2236 ,  H01L21/26506 ,  H01L21/30604

Abstract: Disclosed is a method for processing a semiconductor wafer. The method includes forming an oxygen containing region in the semiconductor wafer, wherein forming the oxygen containing region includes introducing oxygen via a first surface into the semiconductor wafer. The method further includes creating vacancies at least in the oxygen containing region and annealing at least the oxygen containing region in an annealing process so as to form oxygen precipitates.