公开(公告)号：US09785198B2

公开(公告)日：2017-10-10

申请号：US14316737

申请日：2014-06-26

Applicant: Intel Corporation

Inventor： Marshall Grinstead ,  Stephen D. Berry ,  Gabriel G. Khouri ,  Tommy S. Montoya ,  Russell S. Aoki

IPC: G06F1/16

CPC classification number: G06F1/1681 ,  G06F1/1632 ,  G06F1/1679 ,  G06F1/1683

Abstract: Particular embodiments described herein provide for an electronic device, such as a notebook computer or laptop, that includes a circuit board coupled to a plurality of electronic components (which includes any type of components, elements, circuitry, etc.). The electronic device may also include a hinge assembly to secure a first housing of the electronic device to a second housing. The hinge assembly is to allow for electrical signals to pass between the first housing and the second housing and for a rotation of the first housing in relation to the second housing. The hinge assembly may include a plurality of discs to receive a plurality of segments of the accessory as the hinge assembly engages to secure the first housing to the second housing.

公开(公告)号：US20170186661A1

公开(公告)日：2017-06-29

申请号：US14998123

申请日：2015-12-23

Applicant: INTEL CORPORATION

Inventor： Russell S. Aoki ,  Jonathan W. Thibado ,  Jeffory L. Smalley ,  David J. Llapitan ,  Thomas A. Boyd ,  Harvey R. Kofstad ,  Dimitrios Ziakas ,  Hongfei Yan

IPC: H01L23/34 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01L23/498

CPC classification number: H01L23/345 ,  H01L23/4006 ,  H01L23/49816 ,  H01L23/49822 ,  H05K1/0212 ,  H05K1/141 ,  H05K1/144 ,  H05K3/3436 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/176

Abstract: A rework grid array interposer with direct power is described. The interposer has a foundation layer mountable between a motherboard and a package. A heater is embedded in the foundation layer to provide local heat to reflow solder to enable at least one of attachment or detachment of the package. A connector is mounted on the foundation layer and coupled to the heater and to the package to provide a connection path directly with the power supply and not via the motherboard. One type of interposer interfaces with a package having a solderable extension. Another interposer has a plurality of heater zones embedded in the foundation layer.

公开(公告)号：US20170176260A1

公开(公告)日：2017-06-22

申请号：US14975938

申请日：2015-12-21

Applicant: INTEL CORPORATION

Inventor： Shelby Ferguson ,  Rashelle Yee ,  Russell S. Aoki ,  Michael Hui ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski

IPC: G01K7/16 ,  H01L23/34

CPC classification number: G01K7/16 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/345 ,  H01L23/473 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81139 ,  H01L2224/81193 ,  H01L2224/81234 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/45099

Abstract: Disclosed herein are integrated circuit (IC) packages with temperature sensor traces, and related systems, devices, and methods. In some embodiments, an IC package may include a package substrate and an IC die disposed on the package substrate, wherein the package substrate includes a temperature sensor trace, and an electrical resistance of the temperature sensor trace is representative of an equivalent temperature of the temperature sensor trace.

公开(公告)号：US10586764B2

公开(公告)日：2020-03-10

申请号：US16072219

申请日：2016-03-31

Applicant: INTEL CORPORATION

Inventor： Russell S. Aoki ,  Dimitrios Ziakas

IPC: H01L23/522 ,  H01L23/498 ,  H01L23/538 ,  H01L23/14 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/34 ,  H01L23/00 ,  H01L23/34

Abstract: Semiconductor packages with programmable routing pathways are disclosed. The semiconductor package may have a source trace that may be electrically coupled to two or more different electrical pathways, where any of the electrical pathways may be activated to provide an electrical connection between the source trace and one or more destination nodes. Each of the electrical pathways may have a corresponding metal well with a correspond airgap overlying the metal well, as well as corresponding heating elements. If a particular heating element is energized, the heating element may melt metal in a corresponding metal well and the molten metal may migrate by capillary action into the overlying airgap to complete an electrical connection between the source trace and a destination node.

公开(公告)号：USD863935S1

公开(公告)日：2019-10-22

申请号：US29513118

申请日：2014-12-26

Applicant: INTEL CORPORATION

Designer： Russell S. Aoki ,  Jeff Ku ,  Sheng-Chao Lin

公开(公告)号：US20180174940A1

公开(公告)日：2018-06-21

申请号：US15383858

申请日：2016-12-19

Applicant: Intel Corporation

Inventor： Shelby Ferguson ,  Gong Ouyang ,  Russell S. Aoki ,  Zhichao Zhang ,  Kai Xiao

IPC: H01L23/34 ,  H01L23/373 ,  H01L23/498

CPC classification number: H01L23/345 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/16225

Abstract: Disclosed herein are fine-featured traces for integrated circuit (IC) package support structures, and related systems, devices, and methods. For example, a device may include a printed circuit board (PCB) having an insulating material and a heater trace on the insulating material. In some embodiments, the heater trace may have a section with a width less than 3.5 mils. In some embodiments, a section of the heater trace may be adjacent to a burned portion of the insulating material.

公开(公告)号：US09991223B2

公开(公告)日：2018-06-05

申请号：US14975532

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： Russell S. Aoki ,  Michael R. Hui ,  Jonathon R. Carstens ,  Michael S. Brazel ,  Daniel P. Carter ,  Thomas A. Boyd ,  Shelby A. Ferguson ,  Rashelle Yee ,  Joseph J. Jasniewski ,  Harvey R. Kofstad ,  Anthony P. Valpiani

IPC: B23K3/08 ,  H04L23/00 ,  H01L23/00 ,  B23K1/00 ,  B23K101/42

CPC classification number: H01L24/75 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/42 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/75703 ,  H01L2224/75754 ,  H01L2224/81139 ,  H01L2224/81234 ,  H01L2924/15311 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613

Abstract: Embodiments of the present disclosure describe package alignment frames for a local reflow process to attach a semiconductor package to an interposer. The frame may comprise a two frame system. The interposer may be on a mounting table or on a circuit board. The frame may include a body with a rectangular opening dimensioned to receive a semiconductor package to be coupled to the interposer. The frame may be to align a ball grid array of the semiconductor package with pads of the interposer. A second frame may be to receive the first frame and may be to align a ball grid array of the interposer with pads of the circuit board. A single frame may be used to couple a semiconductor package to an interposer and to couple the interposer to a circuit board. Other embodiments may be described and/or claimed.

公开(公告)号：US09859636B2

公开(公告)日：2018-01-02

申请号：US14757915

申请日：2015-12-24

Applicant: INTEL CORPORATION

Inventor： Thomas A. Boyd ,  Jeffory L. Smalley ,  Russell S. Aoki ,  Karumbu Meyyappan

IPC: H01R12/72 ,  H01R12/70 ,  H01R13/631 ,  H01R13/635 ,  H01R13/648 ,  H01R43/26

CPC classification number: H01R12/721 ,  H01R12/7005 ,  H01R12/774 ,  H01R13/508 ,  H01R13/631 ,  H01R13/635 ,  H01R13/6485 ,  H01R43/26

Abstract: An example apparatus for connecting linear edge cards includes a housing to hold at least one set of conductive contacts facing perpendicularly towards a mating plane. The apparatus further includes an activator bar coupled to the housing, the activator bar to hold two parts of the housing apart via two opposing normal forces. The apparatus also includes a contact load spring coupled to the housing, the contact load spring to apply two forces parallel to the direction of the conductive contacts and against the two opposing normal forces of the activator bar. The apparatus further includes an ejector spring coupled to the contact load spring and the activator bar. The ejector spring is to apply a force perpendicular to the two opposing normal forces of the activator bar and in a direction of an opening of the housing.

公开(公告)号：US20170178994A1

公开(公告)日：2017-06-22

申请号：US14975943

申请日：2015-12-21

Applicant: Intel Corporation

Inventor： Michael Hui ,  Rashelle Yee ,  Jonathan Thibado ,  Daniel P. Carter ,  Shelby Ferguson ,  Anthony P. Valpiani ,  Russell S. Aoki ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski ,  Harvey R. Kofstad ,  Michael Brazel ,  Tracy Clack ,  Viktor Vogman ,  Penny Woodcock ,  Kevin J. Ceurter ,  Hongfei Yan

IPC: H01L23/34 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/345 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81234 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Disclosed herein are integrated circuit (IC) package support structures, and related systems, devices, and methods. In some embodiments, an IC package support structure may include a first heater trace, and a second heater trace, wherein the second heater trace is not conductively coupled to the first heater trace in the IC package support structure.

公开(公告)号：US09483126B2

公开(公告)日：2016-11-01

申请号：US15155272

申请日：2016-05-16

Applicant: Intel Corporation

Inventor： Mark E. Sprenger ,  Russell S. Aoki ,  Paul J. Gwin ,  Ralph V. Miele ,  Shawn McEuen ,  Mark MacDonald ,  David Pidwerbecki

IPC: E05D11/08 ,  H05K5/02 ,  G06F1/16 ,  G06F3/033

CPC classification number: G06F3/033 ,  E05D3/02 ,  E05D11/08 ,  E05D11/082 ,  E05D2011/085 ,  E05D2011/088 ,  G06F1/1616 ,  G06F1/1679 ,  G06F1/1681 ,  G06F1/1683 ,  H05K5/0226

Abstract: In one example an electronic device comprises a controller, a chassis comprising a first section and a second section, and a hinge assembly to connect the first section of the chassis to the second section of the chassis comprising a shaft rotatable about a first axis, a brake selectively engageable with a portion of the shaft, and an electroactive polymer (EAP) actuator coupled to the brake, wherein the EAP actuator selectively engages the brake with a portion of the shaft in response to a signal from the controller. Other examples may be described.