Automatic analyzing apparatus
    33.
    发明授权
    Automatic analyzing apparatus 有权
    自动分析仪

    公开(公告)号:US07939020B2

    公开(公告)日:2011-05-10

    申请号:US11797240

    申请日:2007-05-02

    IPC分类号: G01N21/00 G01N31/00 G01N35/02

    摘要: An automatic analyzing apparatus has an analysis section including an immunity analysis unit and a biochemical componential analysis unit. A sample rack which has undergone the immunity componential analysis is horizontally fed by a rack feeding mechanism from a position confronting the inlet of a rack stationing section to a position near the outlet of the rack stationing section, so that the sample rack is directly moved to a return line, while skipping over the rack stationing section, so as to be efficiently returned to the analysis section and subjected to a subsequent biochemical analysis. A sample rack that needs reexamination by an identical analysis unit is also returned in the same efficient way.

    摘要翻译: 自动分析装置具有包括免疫分析单元和生化分析单元的分析部。 已经经过免疫组分分析的样品架通过齿条进给机构从面向机架定位部分的入口的位置到靠近机架定位部分出口处的位置水平馈送,使样品架直接移动到 返回线,同时跳过机架驻留部分,以便有效地返回到分析部分并进行随后的生化分析。 需要通过相同分析单元进行复检的样品架也以相同的有效方式返回。

    SEMICONDUCTOR DEVICE
    34.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20110001209A1

    公开(公告)日:2011-01-06

    申请号:US12867283

    申请日:2009-03-12

    IPC分类号: H01L29/47

    摘要: In a termination structure in which a JTE layer is provided, a level or defect existing at an interface between a semiconductor layer and an insulating film, or a minute amount of adventitious impurities that infiltrate into the semiconductor interface from the insulating film or from an outside through the insulating film becomes a source or a breakdown point of a leakage current, which deteriorates a breakdown voltage. A semiconductor device includes: an n− type semiconductor layer formed on an n+ type semiconductor substrate; a first electrode that is formed on the n− type semiconductor layer and functions as a Schottky electrode; a GR layer that is a first p type semiconductor layer formed on a surface of the n− type semiconductor layer below an end of the first electrode and a perimeter thereof; a JTE layer that is formed of a second p type semiconductor layer formed on a bottom and a lateral surface of a groove arranged in a ring shape around the GR layer apart from the GR layer, in a surface of the n− typesemiconductor layer; an insulating film provided so as to cover the GR layer and the JTE layer; and a second electrode that is an Ohmic electrode formed below a rear surface of the n+ type semiconductor substrate.

    摘要翻译: 在提供JTE层的端接结构中,存在于半导体层和绝缘膜之间的界面处的水平或缺陷,或从绝缘膜或外部渗透到半导体界面的少量不定性杂质 通过绝缘膜成为漏电流的源极或击穿点,这会降低击穿电压。 半导体器件包括:形成在n +型半导体衬底上的n型半导体层; 形成在n型半导体层上并用作肖特基电极的第一电极; GR层,其是形成在所述第一电极的端部下方的所述n型半导体层的表面上的第一p型半导体层及其周边; 在所述n型半导体层的表面中形成由形成在所述GR层之外的围绕所述GR层的环状的槽的底部和侧面上形成的第二p型半导体层的JTE层; 设置为覆盖GR层和JTE层的绝缘膜; 以及形成在n +型半导体衬底的后表面下方的欧姆电极的第二电极。

    Radio system, radio apparatus, and antenna device
    35.
    发明授权
    Radio system, radio apparatus, and antenna device 有权
    无线电系统,无线电设备和天线装置

    公开(公告)号:US07855694B2

    公开(公告)日:2010-12-21

    申请号:US12148974

    申请日:2008-04-24

    申请人: Hiroshi Watanabe

    发明人: Hiroshi Watanabe

    IPC分类号: H01Q7/04 H01Q1/52 H01Q1/00

    CPC分类号: H01Q7/00 H01Q1/521

    摘要: According to an aspect of the present invention, there is provided a radio system including: a first radio apparatus that has a first loop antenna; and a second radio apparatus that has a second loop antenna and that performs a radio communication with the first radio apparatus when the second loop antenna is opposed with the first loop antenna, wherein the second radio apparatus has a shield member that is formed of a magnetic substance and disposed to shield at least a portion of the second loop antenna with respect to the first loop antenna when the radio communication is performed.

    摘要翻译: 根据本发明的一个方面,提供了一种无线电系统,包括:具有第一环形天线的第一无线电设备; 以及第二无线电设备,其具有第二环形天线,并且当所述第二环形天线与所述第一环形天线相对时,与所述第一无线电设备进行无线电通信,其中所述第二无线电设备具有由磁性材料形成的屏蔽构件 并且被设置为当执行无线电通信时,相对于第一环形天线屏蔽第二环形天线的至少一部分。

    Time-switch carrying removable storage and semiconductor integrated circuit
    36.
    发明授权
    Time-switch carrying removable storage and semiconductor integrated circuit 有权
    时间开关携带可移动存储和半导体集成电路

    公开(公告)号:US07813206B2

    公开(公告)日:2010-10-12

    申请号:US11845451

    申请日:2007-08-27

    申请人: Hiroshi Watanabe

    发明人: Hiroshi Watanabe

    IPC分类号: G11C7/00

    CPC分类号: G11C16/22 G06F21/10

    摘要: Time-switch carrying removable storage includes a memory cell array, a bit line decoder connected with bit lines of the memory cell array, a word line decoder connected with word lines of the memory cell array, a bit line system amplifier connected with the bit line decoder, a word line system amplifier connected with the word line decoder, a semiconductor time switch clamped or bridged between the bit line system amplifier and the bit line decoder, and performing time management of access of the bit line amplifier and the bit line decoder to/from each other without a power supply, a time switch initializer which sets an operation period of the semiconductor time switch, and a controller connected with the bit line system amplifier and the word line system amplifier to control the amplifiers, and having an I/O terminal which transmits/receives an input/output signal.

    摘要翻译: 携带可拆卸存储器的时间切换包括存储单元阵列,与存储单元阵列的位线连接的位线解码器,与存储单元阵列的字线连接的字线解码器,与位线连接的位线系统放大器 解码器,与字线解码器连接的字线系统放大器,钳位或桥接在位线系统放大器和位线解码器之间的半导体时间开关,并且执行位线放大器和位线解码器的访问的时间管理 设置半导体时间开关的工作周期的时间切换初始化器,与位线系统放大器和字线系统放大器连接的控制放大器的控制器,并具有I / O端子,其发送/接收输入/输出信号。

    SACRIFICIAL ELECTRODE MOUNTING STRUCTURE
    37.
    发明申请
    SACRIFICIAL ELECTRODE MOUNTING STRUCTURE 有权
    极性电极安装结构

    公开(公告)号:US20100251978A1

    公开(公告)日:2010-10-07

    申请号:US12700203

    申请日:2010-02-04

    IPC分类号: F01P11/06

    CPC分类号: F01P11/06

    摘要: Mounting port, provided adjacent to a cooling water passageway, has a hole opening from the passageway for mounting an anode metal in the passageway. Lid member, which closes the outer end of the hole, has a head portion formed at its outer end and an externally threaded portion engageable with an internally threaded portion of the hole with a sealing member sandwiched therebetween. The lid member having the anode metal fixed thereto is inserted in and attached to the port with the threaded portions engaging with each other with a sealing tape sandwiched therebetween. Space is defined between an outer end portion of the port and an outer end portion of the lid member between the head portion and the externally threaded portion so that part of the sealing member protruding from between the threaded portions can be received in the space.

    摘要翻译: 设置在冷却水通道附近的安装口具有从通道开口的孔,用于将阳极金属安装在通道中。 关闭孔的外端的盖构件具有形成在其外端的头部部分和外螺纹部分,该部分可与孔的内螺纹部分接合,密封构件夹在其间。 将固定有阳极金属的盖构件插入并附接到端口,螺纹部分彼此接合,并且夹在其间的密封带。 在端头的外端部和盖部件的外端部之间限定空间,头部和外螺纹部分之间,使得从螺纹部分之间突出的部分密封件能够被容纳在空间中。

    Plasma display device including a chassis member having a plurality of divided base metal plates
    38.
    发明授权
    Plasma display device including a chassis member having a plurality of divided base metal plates 有权
    等离子体显示装置,其包括具有多个分开的基底金属板的底座构件

    公开(公告)号:US07768202B2

    公开(公告)日:2010-08-03

    申请号:US11883548

    申请日:2006-12-27

    IPC分类号: H01J17/24 H05K7/16 H05K5/00

    CPC分类号: H05K7/20972 H01J2217/49

    摘要: A plasma display device includes a plasma display panel 11 that has a front substrate including a plurality of display electrodes arranged thereon and a rear substrate having data electrodes arranged thereon to cross the display electrodes, the front substrate and the rear substrate facing each other so as to form a discharge space, and chassis member 20 that holds plasma display panel 11 on a front side and has a driving circuit block for driving plasma display panel 11 on a rear side. Chassis member 20 has base plate 36 that is divided into a plurality of base metal plates 36a, 36b, and 36c, to which plasma display panel 11 is attached, and metal plates 37 and 38 that couple the plurality of base metal plates 36a, 36b, and 36c together.

    摘要翻译: 等离子体显示装置包括等离子体显示面板11,其具有包括布置在其上的多个显示电极的前基板和布置有数据电极的后基板,以跨越显示电极,前基板和后基板彼此面对,以便 以形成放电空间,以及在前侧保持等离子体显示面板11的底板部件20,并且具有用于驱动后侧的等离子体显示面板11的驱动电路块。 底盘部件20具有基板36,该基板36被分成多个安装有等离子体显示面板11的基板金属板36a,36b和36c以及耦合多个基板金属板36a,36b的金属板37和38 和36c在一起。

    RADIO COMMUNICATION APPARATUS AND METHOD FOR MAKING RADIO COMMUNICATION APPARATUS
    39.
    发明申请
    RADIO COMMUNICATION APPARATUS AND METHOD FOR MAKING RADIO COMMUNICATION APPARATUS 失效
    无线电通信设备和制造无线电通信设备的方法

    公开(公告)号:US20100090914A1

    公开(公告)日:2010-04-15

    申请号:US12546037

    申请日:2009-08-24

    申请人: Hiroshi Watanabe

    发明人: Hiroshi Watanabe

    IPC分类号: H01Q1/24 H01P11/00 H01Q1/00

    摘要: A radio communication apparatus configured to be used for first radio communication and second radio communication which are different from each other is provided. The radio communication apparatus has a first antenna, a coupling reduction element, a magnetic material sheet and a second antenna. The first antenna is configured to be used for the first radio communication, and is formed by a conductive line wound in a plane like a coil. The coupling reduction element is formed by a plane-shaped conductor, provided almost parallel to the plane of the first antenna, and configured to be put in a condition of electrical floating. The magnetic material sheet is provided between the first antenna and the coupling reduction element. The second antenna is configured to be used for the second radio communication, and is provided close to at least a portion of the first antenna.

    摘要翻译: 提供了一种被配置为用于彼此不同的第一无线电通信和第二无线电通信的无线电通信装置。 无线电通信装置具有第一天线,耦合减小元件,磁性材料片和第二天线。 第一天线被配置为用于第一无线电通信,并且由缠绕在类似线圈的平面中的导线形成。 联接减速元件由平面形状的导体形成,该平面形状的导体几乎平行于第一天线的平面,并被构造成处于电浮动状态。 磁性材料板设置在第一天线和耦合减速元件之间。 第二天线被配置为用于第二无线电通信,并且被设置在第一天线的至少一部分附近。

    Method of designing and manufacturing semiconductor device
    40.
    发明授权
    Method of designing and manufacturing semiconductor device 失效
    半导体器件的设计和制造方法

    公开(公告)号:US07681155B2

    公开(公告)日:2010-03-16

    申请号:US11858551

    申请日:2007-09-20

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5036

    摘要: A semiconductor device designing method includes calculating capacitance. The semiconductor device has a semiconductor substrate, an insulator formed on the semiconductor substrate, and an electrode formed on the insulator. The capacitance is calculated under an approximation assuming a portion of the semiconductor substrate, the insulator and a portion of the electrode to be one of a conductor and a dielectric depending on electric characteristics thereof, respectively.

    摘要翻译: 半导体器件设计方法包括计算电容。 半导体器件具有半导体衬底,形成在半导体衬底上的绝缘体和形成在绝缘体上的电极。 假设半导体衬底的一部分,绝缘体和电极的一部分分别根据其电特性分别为导体和电介质之一,在近似值下计算电容。