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    Etch metric sensitivity for endpoint detection
    32.
    发明授权
    Etch metric sensitivity for endpoint detection 有权

    公开(公告)号：US10032681B2

    公开(公告)日：2018-07-24

    申请号：US15059073

    申请日：2016-03-02

    Applicant: Lam Research Corporation

    Inventor： Andrew D. Bailey, III ,  Mehmet Derya Tetiker ,  Duncan W. Mills

    IPC: H01L21/66 ,  G06F17/50 ,  G06F17/10 ,  H01L21/3065 ,  G01B11/24

    Abstract: Monitoring a geometric parameter value for one or more features produced on a substrate during an etch process may involve: (a) measuring optical signals produced by optical energy interacting with features being etched on the substrate; (b) providing a subset of the measured optical signals, wherein the subset is defined by a range where optical signals were determined to correlate with target geometric parameter values for features; (c) applying the subset of optical signals to a model configured to predict the target geometric parameter values from the measured optical signals; (d) determining, from the model, a current value of the target geometric parameter of the features being etched; (e) comparing the current value of the target geometric parameter of the features being etched to an etch process endpoint value for the target geometric parameter; and (f) repeating (a)-(e) until the comparing in (e) indicates that the current value of the target geometric parameter of the features being etched has reached the endpoint value.

    Method of Feature Exaction from Time-series of Spectra to Control Endpoint of Process
    33.
    发明申请
    Method of Feature Exaction from Time-series of Spectra to Control Endpoint of Process 审中-公开

    公开(公告)号：US20180182632A1

    公开(公告)日：2018-06-28

    申请号：US15389451

    申请日：2016-12-23

    Applicant: Lam Research Corporation

    Inventor： Ye Feng ,  Prashanth Kumar ,  Andrew D. Bailey, III

    IPC: H01L21/3065 ,  H01L21/66

    CPC classification number: H01L22/26 ,  H01J37/32926 ,  H01J37/32963 ,  H01J37/32972 ,  H01L21/67259 ,  H01L22/00 ,  H01L22/12 ,  H01L22/24

    Abstract: Methods and systems for using a time-series of spectra to identify endpoint of an etch process. One method includes accessing a virtual carpet that is formed from a time-series of spectra for the etch process collected during a training operation. And, running a fabrication etch process on a fabrication wafer, such that while the fabrication etch process is performed portions of a carpet defined from a time-series of spectral is generated for the fabrication etch process. Then, comparing the portions of the carpet of the fabrication etch process to the virtual carpet. End pointing is processed for the fabrication etch process when said comparing indicates that a desired metric has been reached for the fabrication wafer. In one example, said portions of the carpet include a current frame of captured spectra and at least one previous frame of captured spectra. The portions of the carpet of the fabrication etch process are fitted to the virtual carpet to identify a virtual frame number and associated floating parameters that are used in a correlation to predicted a value for the metric. Further, each of the carpets produced during the training operation and the virtual carpet are defined by a polynomial. The coefficients of the carpets produced during the training operation are a subset of the coefficients of the polynomial of the virtual carpet.

    ETCH METRIC SENSITIVITY FOR ENDPOINT DETECTION
    35.
    发明申请
    ETCH METRIC SENSITIVITY FOR ENDPOINT DETECTION 审中-公开

    公开(公告)号：US20170256463A1

    公开(公告)日：2017-09-07

    申请号：US15059073

    申请日：2016-03-02

    Applicant: Lam Research Corporation

    Inventor： Andrew D. Bailey, III ,  Mehmet Derya Tetiker ,  Duncan W. Mills

    IPC: H01L21/66 ,  G06F17/50 ,  G06F17/10 ,  H01L21/3065

    CPC classification number: H01L22/12 ,  G01B11/24 ,  G01B2210/56 ,  G06F17/10 ,  G06F17/5009 ,  H01L21/3065 ,  H01L22/26

    Abstract: Monitoring a geometric parameter value for one or more features produced on a substrate during an etch process may involve: (a) measuring optical signals produced by optical energy interacting with features being etched on the substrate; (b) providing a subset of the measured optical signals, wherein the subset is defined by a range where optical signals were determined to correlate with target geometric parameter values for features; (c) applying the subset of optical signals to a model configured to predict the target geometric parameter values from the measured optical signals; (d) determining, from the model, a current value of the target geometric parameter of the features being etched; (e) comparing the current value of the target geometric parameter of the features being etched to an etch process endpoint value for the target geometric parameter; and (f) repeating (a)-(e) until the comparing in (e) indicates that the current value of the target geometric parameter of the features being etched has reached the endpoint value.

    Methods for Detecting Endpoint for Through-Silicon Via Reveal Applications
    38.
    发明申请
    Methods for Detecting Endpoint for Through-Silicon Via Reveal Applications 审中-公开
    通过显示应用检测透硅端点的方法

    公开(公告)号：US20170062290A1

    公开(公告)日：2017-03-02

    申请号：US15353305

    申请日：2016-11-16

    Applicant: Lam Research Corporation

    Inventor： Alan Jeffrey Miller ,  Evelio Sevillano ,  Jorge Luque ,  Andrew D. Bailey, III ,  Qing Xu

    IPC: H01L21/66 ,  H01L21/67 ,  H01L21/768 ,  H01L21/3065

    CPC classification number: H01L22/26 ,  H01L21/3065 ,  H01L21/67253 ,  H01L21/76898 ,  H01L22/12

    Abstract: Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.

    Abstract translation: 用于处理半导体晶片的系统和方法包括等离子体处理室。 等离子体处理室包括外部，具有晶片接收机构的内部区域和设置在等离子体处理室的侧壁上的视口，其提供从外部到晶片接收机构上接收的晶片的视觉访问。 照相机安装在外部的等离子体处理室的视口上并耦合到图像处理器。 图像处理器包括图案识别逻辑，以将由相机捕获和发射的新兴图案的图像与参考图案相匹配，并且当检测到匹配时产生定义端点的信号。 耦合到图像处理器和等离子体处理室的系统处理控制器接收来自图像处理器的信号，并且调整一个或多个资源的控制以停止蚀刻操作。

    Methods for processing bevel edge etching
    39.
    发明授权
    Methods for processing bevel edge etching 有权
    斜边蚀刻处理方法

    公开(公告)号：US09564308B2

    公开(公告)日：2017-02-07

    申请号：US14937716

    申请日：2015-11-10

    Applicant: Lam Research Corporation

    Inventor： Gregory S. Sexton ,  Andrew D. Bailey, III ,  Andras Kuthi ,  Yunsang Kim

    IPC: H01L21/02 ,  H01L21/3213 ,  H01L21/311 ,  H01J37/32

    CPC classification number: H01L21/02087 ,  H01J37/32009 ,  H01J37/32082 ,  H01J37/32559 ,  H01J37/32642 ,  H01J37/32862 ,  H01L21/02057 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

    Abstract: The embodiments provide apparatus and methods for removal of etch byproducts, dielectric films and metal films near the substrate bevel edge, and chamber interior to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. In an exemplary embodiment, a plasma processing chamber configured to clean a bevel edge of a substrate is provided. The plasma processing chamber includes a substrate support configured to receive the substrate. The plasma processing chamber also includes a bottom edge electrode surrounding the substrate support. The bottom edge electrode and the substrate support are electrically isolated from one another by a bottom dielectric ring. A surface of the bottom edge electrode facing the substrate is covered by a bottom thin dielectric layer. The plasma processing chamber further includes a top edge electrode surrounding a top insulator plate opposing the substrate support. The top edge electrode is electrically grounded. A surface of the top edge electrode facing the substrate is covered by a top thin dielectric layer. The top edge electrode and the bottom edge electrode oppose one another and are configured to generate a cleaning plasma to clean the bevel edge of the substrate.

    Abstract translation: 这些实施例提供用于去除蚀刻副产物，电介质膜和金属膜附近的衬底斜面边缘的设备和方法，以及室内，以避免聚合物副产物和沉积膜的堆积并提高工艺产率。 在示例性实施例中，提供了构造成清洁基板的斜边缘的等离子体处理室。 等离子体处理室包括被配置为接收衬底的衬底支撑件。 等离子体处理室还包括围绕衬底支撑件的底部边缘电极。 底部边缘电极和基底支撑件通过底部介电环彼此电隔离。 面向基板的底部边缘电极的表面被底部薄的电介质层覆盖。 等离子体处理室还包括围绕与衬底支撑件相对的顶部绝缘体板的顶部边缘电极。 顶边电极电接地。 面向衬底的顶边电极的表面被顶部薄介电层覆盖。 顶边电极和下边缘电极彼此相对并且被配置为产生清洁等离子体以清洁衬底的斜边缘。

    PULSED PLASMA CHAMBER IN DUAL CHAMBER CONFIGURATION
    40.
    发明申请
    PULSED PLASMA CHAMBER IN DUAL CHAMBER CONFIGURATION 审中-公开
    双室配置中的脉冲等离子体室

    公开(公告)号：US20160148786A1

    公开(公告)日：2016-05-26

    申请号：US15011112

    申请日：2016-01-29

    Applicant: Lam Research Corporation

    Inventor： Alexei Marakhtanov ,  Rajinder Dhindsa ,  Eric Hudson ,  Andrew D. Bailey, III

    IPC: H01J37/32 ,  H01L21/67 ,  H01L21/311

    Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to set parameters to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF period, and to assist in the re-striking of the bottom plasma during the ON period.

    Abstract translation: 提供了用于在脉冲等离子体室中处理衬底的实施例。 具有两个腔室的处理装置，由流体连接腔室的板分开，包括连续波（CW）控制器，脉冲控制器和系统控制器。 CW控制器设置耦合到顶部电极的第一射频（RF）电源的电压和频率。 脉冲控制器可操作地为耦合到底部电极的第二RF电源产生的脉冲RF信号设置电压，频率，接通周期持续时间和关闭周期持续时间。 系统控制器可操作以设定参数以调节室之间的物质流动，以辅助负离子蚀刻，以在关闭期间中止余辉期间晶片表面上的过多正电荷，并且辅助重击 在ON期间的底部等离子体。

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