Abstract:
In at least one embodiment, the method is designed for producing a light-emitting diode display (1). The method comprises the following steps: •A) providing a growth substrate (2); •B) applying a buffer layer (4) directly or indirectly onto a substrate surface (20); •C) producing a plurality of separate growth points (45) on or at the buffer layer (4); •D) producing individual radiation-active islands (5), originating from the growth points (45), wherein the islands (5) each comprise an inorganic semiconductor layer sequence (50) with at least one active zone (55) and have a mean diameter, when viewed from above onto the substrate surface (20), between 50 nm and 20 μm inclusive; and •E) connecting the islands (5) to transistors (6) for electrically controlling the islands (5).
Abstract:
A radiation-emitting semiconductor device and a fabric are disclosed. In an embodiment, a radiation-emitting semiconductor device includes a semiconductor layer sequence having an active region configured to generate radiation and at least one carrier on which the semiconductor layer sequence is arranged, wherein the at least one carrier has at least one anchoring structure on a carrier underside facing away from the semiconductor layer sequence, wherein the at least one anchoring structure includes electrical contact points for making electrical contact with the semiconductor layer sequence, and wherein the at least one anchoring structure is configured to receive at least one thread for fastening the semiconductor device to a fabric and for electrical contacting the at least one thread.
Abstract:
A display device is disclosed. In an embodiment a display device having a plurality of pixels separately operable from each other includes a semiconductor layer sequence including a first semiconductor layer, an active layer and a second semiconductor layer, a first contact structure contacting the first semiconductor layer and a second contact structure contacting the second semiconductor layer and at least one separating region extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, wherein the semiconductor layer sequence and the first contact structure have at least one first recess laterally adjacent with respect to a respective pixel, the first recess extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, and wherein the second contact structure includes second contacts extending through the at least one first recess.
Abstract:
A method for producing a semiconductor chip and a semiconductor chip are disclosed. In an embodiment, the method includes providing a semiconductor layer sequence having a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer is formed as a p-conducting semiconductor region and the second semiconductor layer is formed as an n-conducting semiconductor region, or vice versa, forming at least one recess in the semiconductor layer sequence so that side surfaces of the first and second semiconductor layers are exposed, wherein the recess is multiple times wider than deep and applying an auxiliary layer for electrically contacting the second semiconductor layer, wherein the auxiliary layer at the side surfaces exposed.
Abstract:
A component with an geometrically adapted contact structure and a method for producing such a component are disclosed. In an embodiment a component includes a contact structure including a contiguous contact layer having a plurality of openings and being assigned to a first electrical polarity of the component and a plurality of individual contacts at least in part having different vertical heights, wherein the contacts extend in the openings throughout the contiguous contact layer, wherein the contacts are laterally spaced from each other and assigned to a second electrical polarity of the component, and wherein the contacts are arranged with respect to their different heights and their positions such that a height distribution of the contacts is adapted to a predetermined geometrically non-planar contour profile.
Abstract:
An optoelectronic semiconductor component has a semiconductor body, wherein the semiconductor body includes a semiconductor layer sequence having a first semiconductor layer, a second semiconductor layer and an active region that generates or receives radiation disposed between the first semiconductor layer and the second semiconductor layer; the semiconductor body has a functional region in which the first semiconductor layer electrically conductively connects to a first terminal layer and the second semiconductor layer electrically conductively connects to a second terminal layer; an isolating layer is arranged on a side of the first terminal layer facing away from the semiconductor body; an interruption is formed in the isolating layer which at least locally delimits an inner subregion of the isolating layer in a lateral direction; the interruption encloses the functional region in the lateral direction; and in a plan view of the semiconductor component, the interruption overlaps with the active region.
Abstract:
A method for producing a semiconductor chip and a semiconductor chip are disclosed. In an embodiment, the method includes providing a semiconductor layer sequence having a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer is formed as a p-conducting semiconductor region and the second semiconductor layer is formed as an n-conducting semiconductor region, or vice versa, forming at least one recess in the semiconductor layer sequence so that side surfaces of the first and second semiconductor layers are exposed, wherein the recess is multiple times wider than deep and applying an auxiliary layer for electrically contacting the second semiconductor layer, wherein the auxiliary layer at the side surfaces exposed.
Abstract:
A method is specified for producing an optoelectronic semiconductor component, comprising the following steps: A) providing a structured semiconductor layer sequence (21, 22, 23) having —a first semiconductor layer (21) with a base region (21c), at least one well (211), and a first cover region (21a) in the region of the well (211) facing away from the base surface (21c), —an active layer (23), and —a second semiconductor layer (22) on a side of the active layer (23) facing away from the first semiconductor layer (21), wherein —the active layer (23) and the second semiconductor layer (22) are structured jointly in a plurality of regions (221, 231) and each region (221, 231) forms, together with the first semiconductor layer (21), an emission region (3), B) simultaneous application of a first contact layer (41) on the first cover surface (21a) and a second contact layer (42) on a second cover surface (3a) of the emission regions (3) facing away from the first semiconductor layer (21) in such a way that —the first contact layer (41) and the second contact layer (42) are electrically separated from each other, and —the first contact layer (41) and the second contact layer (42) run parallel to each other.
Abstract:
An optoelectronic semiconductor chip includes a semiconductor layer sequence with an upper face and a lower face opposite the upper face, wherein the semiconductor layer sequence has an active layer that generates electromagnetic radiation, and a plurality of contact elements that electrically contact the semiconductor layer sequence arranged on the upper face, wherein the semiconductor chip is a thin-film semiconductor chip, the lower face is a radiation decoupling surface through which the radiation generated in the semiconductor layer sequence is decoupled, the contact elements can be electrically actuated individually and independently from one another, and the semiconductor layer sequence has a thickness of at most 3 μm.
Abstract:
An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment the optoelectronic component includes a semiconductor chip subdivided into a plurality of pixels, the pixels being arranged next to one another in a lateral direction and being configured to be activated individually and independently and a metallic connecting element having an upper side and an underside, the connecting element including a contiguous metallic connecting layer, which is completely passed through by a plurality of first metallic through-connections arranged next to one another in the lateral direction, wherein the first through-connections are electrically insulated and spaced from the connecting layer by insulating regions, wherein each first through-connection is unambiguously assigned to one pixel, is electrically-conductively connected to this pixel and forms a first electrical contact to this pixel, and wherein the semiconductor chip is connected by the connecting element to a carrier.