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    METHOD FOR PRODUCING A LIGHT-EMITTING DIODE DISPLAY AND LIGHT-EMITTING DIODE DISPLAY
    1.
    发明申请
    METHOD FOR PRODUCING A LIGHT-EMITTING DIODE DISPLAY AND LIGHT-EMITTING DIODE DISPLAY 有权
    用于生产发光二极管显示器和发光二极管显示器的方法

    公开(公告)号：US20150279902A1

    公开(公告)日：2015-10-01

    申请号：US14433379

    申请日：2013-09-30

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： Norwin Von Malm ,  Martin Mandl ,  Alexander F. Pfeuffer ,  Britta Goeoetz

    IPC: H01L27/15 ,  H01L29/66 ,  H01L33/50 ,  H01L29/78 ,  H01L33/00 ,  H01L33/12

    CPC classification number: H01L27/156 ,  H01L25/0753 ,  H01L29/66568 ,  H01L29/78 ,  H01L33/007 ,  H01L33/12 ,  H01L33/507 ,  H01L2924/0002 ,  H01L2933/0041 ,  H01L2933/0091 ,  H01L2924/00

    Abstract: In at least one embodiment, the method is designed for producing a light-emitting diode display (1). The method comprises the following steps: •A) providing a growth substrate (2); •B) applying a buffer layer (4) directly or indirectly onto a substrate surface (20); •C) producing a plurality of separate growth points (45) on or at the buffer layer (4); •D) producing individual radiation-active islands (5), originating from the growth points (45), wherein the islands (5) each comprise an inorganic semiconductor layer sequence (50) with at least one active zone (55) and have a mean diameter, when viewed from above onto the substrate surface (20), between 50 nm and 20 μm inclusive; and •E) connecting the islands (5) to transistors (6) for electrically controlling the islands (5).

    Abstract translation: 在至少一个实施例中，该方法被设计用于制造发光二极管显示器（1）。 该方法包括以下步骤：a）提供生长衬底（2）; •B）将缓冲层（4）直接或间接地施加到衬底表面（20）上; C）在缓冲层（4）上或缓冲层（4）上产生多个单独的生长点（45）; •D）产生源自生长点（45）的单个辐射活性岛（5），其中岛（5）各自包含具有至少一个活性区（55）的无机半导体层序列（50），并且具有 当从上方观察到基底表面（20）时，平均直径在50nm和20μm之间; 以及•E）将岛（5）连接到用于电控制岛（5）的晶体管（6）。

    Method for producing a plurality of semiconductor chips and semiconductor chip
    3.
    发明授权
    Method for producing a plurality of semiconductor chips and semiconductor chip 有权

    公开(公告)号：US10453989B2

    公开(公告)日：2019-10-22

    申请号：US15552259

    申请日：2016-02-15

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Lutz Hoeppel ,  Alexander F. Pfeuffer ,  Dominik Scholz ,  Isabel Otto ,  Norwin Von Malm ,  Stefan Illek

    IPC: H01L21/76 ,  H01L33/00 ,  H01L33/48 ,  H01L21/02

    Abstract: Disclosed is a method for producing a plurality of semiconductor chips (10). A composite (1), which comprises a carrier (4) and a semiconductor layer sequence (2, 3), is provided. Separating trenches (17) are formed in the semiconductor layer sequence (2, 3) along an isolation pattern (16). A filling layer (11) limiting the semiconductor layer sequence (2, 3) toward the separating trenches (17) is applied to a side of the semiconductor layer sequence (2, 3) facing away from the carrier (4). Furthermore, a metal layer (10) adjacent to the filling layer (11) is applied in the separating trenches (17). The semiconductor chips (20) are isolated by removing the metal layer (10) adjacent to the filling layer (11) in the separating trenches (17). Each isolated semiconductor chip (20) has one part of the semiconductor layer sequence (2, 3), and of the filling layer (11). Also disclosed is a semiconductor chip (10).

    Method for producing an optoelectronic device
    4.
    发明授权
    Method for producing an optoelectronic device 有权

    公开(公告)号：US10193037B2

    公开(公告)日：2019-01-29

    申请号：US15120504

    申请日：2015-02-10

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Siegfried Herrmann ,  Norwin Von Malm

    IPC: H01L33/62 ,  H01L33/00 ,  H01L33/48 ,  H01L25/075 ,  H01L25/00

    Abstract: A method for manufacturing an opto-electronic component (100) is given, comprising a provision of a carrier (1) with at least one mounting surface (11), a generation of at least two vias (4) in the carrier (1) with electrically conducting contacts (12, 13) running through the vias (4), a provision of at least one light-emitting semiconductor chip (2), wherein the semiconductor chip (2) comprises a growth substrate (10) and a layer sequence (7) epitaxially grown thereon, a mounting of the at least one semiconductor chip (2) onto the at least one mounting surface (11) of the carrier (1), wherein the semiconductor chip (2) is connected in an electrically conducting manner to the contacts (12, 13) in the same method step during the mounting onto the mounting surface (11), an isolation of the carrier (1) along isolation lines (V), wherein an isolation line (V) runs through at least one of the vias (4), so that, after the isolation, the contacts (12, 13) form contact surfaces (5) at at least one side surface (1a) of the carrier (1), wherein the side surface (1a) is perpendicular to the mounting surface (11) of the carrier (1), and a mounting of the carrier (1) with the contact surfaces (5) on a connection plate (8), wherein the mounting surface (11) is perpendicular to the connection plate (8).

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