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    SEMICONDUCTOR DEVICE
    32.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250040176A1

    公开(公告)日：2025-01-30

    申请号：US18629093

    申请日：2024-04-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngtaek Oh ,  Jiwoong Kim ,  Taehun Kim ,  Minkyung Bae ,  Seungjae Baik ,  Jaeduk Lee ,  Doohee Hwang

    IPC: H01L29/78 ,  H01L23/00 ,  H01L25/065 ,  H01L29/08 ,  H01L29/10 ,  H10B80/00

    Abstract: A semiconductor device includes a peripheral circuit structure and a cell structure stacked on the peripheral circuit structure. The cell structure includes a plurality of gate electrodes spaced apart from each other in a vertical direction, a channel structure passing through the plurality of gate electrodes and extending in the vertical direction, the channel structure having a first end close to the peripheral circuit structure and a second end opposite to the first end, and a common source layer covering the second end of the channel structure. The channel structure includes a channel layer extending in the vertical direction, the common source layer includes a first region and a second region that contain impurities of different conductivity types, and the first region of the common source layer is connected to at least a portion of the channel layer.

    Semiconductor device
    36.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11903197B2

    公开(公告)日：2024-02-13

    申请号：US17148334

    申请日：2021-01-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Suhwan Lim ,  Jaehun Jung ,  Sanghoon Kim ,  Taehun Kim ,  Seongchan Lee

    IPC: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

    CPC classification number: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

    Abstract: A semiconductor device includes gate electrodes and insulating layers spaced apart from each other on a substrate and alternately stacked in a direction perpendicular to an upper surface of the substrate, and channel structures that extend through stack structures. Ones of the structures include a channel insulating layer, a pad layer on the channel insulating layer, and a channel layer. The channel layer includes a first channel region, and a second channel region including a semiconductor material having a length shorter than a length of the first channel region and having an impurity concentration of a first conductivity type and the pad layer includes a semiconductor material doped with a second conductivity type impurity. A height level of a lower surface of the second channel region is lower than a height level of a lower surface of a first erase gate electrode.

    Semiconductor light emitting device and light emitting device package
    37.
    发明授权
    Semiconductor light emitting device and light emitting device package 有权

    公开(公告)号：US11888091B2

    公开(公告)日：2024-01-30

    申请号：US17135686

    申请日：2020-12-28

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Taehun Kim ,  Sungwon Ko ,  Bokyoung Kim ,  Jinhwan Kim ,  Wongoo Hur

    IPC: H01L33/38 ,  H01L33/56 ,  H01L33/64 ,  H01L33/40

    CPC classification number: H01L33/38 ,  H01L33/405 ,  H01L33/56 ,  H01L33/644

    Abstract: A semiconductor light emitting device includes a substrate structure, first and second regions and a main region; a light emitting structure, first and second electrode layers, an interlayer insulating layer, and a pad electrode layer. The light emitting structure is provided on the third region. The first electrode layer is provided between the substrate structure and the light emitting structure, and has a first electrode extension that extends into the first region. The second electrode layer is provided between the first electrode layer and the light emitting structure, and has a second electrode extension that extends into the second region. The interlayer insulating layer is provided between the first and second electrode layers, and has an opening exposing a portion of the first electrode extension. The pad electrode layer is provided on the interlayer insulating layer, and is connected to the portion of the first electrode extension through the opening.

    SEMICONDUCTOR PACKAGE
    38.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240030214A1

    公开(公告)日：2024-01-25

    申请号：US18480310

    申请日：2023-10-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang Cheon PARK ,  Dae-Woo Kim ,  Taehun Kim ,  Hyuekjae Lee

    IPC: H01L25/18 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

    CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49822

    Abstract: A semiconductor package includes a redistribution substrate, a first memory chip provided on the redistribution substrate, the first memory chip comprising a first base layer, a first circuit layer provided on a top surface of the first base layer, and a first via penetrating the first base layer and connected to the first circuit layer and the redistribution substrate, a logic chip provided on the first memory chip, and a first molding layer surrounding the first memory chip. An outer side surface of the first molding layer is coplanar with a side surface of the logic chip. At an interface of the logic chip and the first memory chip, a first chip pad provided in the first circuit layer of the first memory chip and a second chip pad of the logic chip are formed of the same material and constitute one body.

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