利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

1445 条记录 (耗时 0.035 秒)

    Circuit and method for overcurrent detection of power switch
    35.
    发明授权
    Circuit and method for overcurrent detection of power switch 有权
    电源开关过电流检测电路及方法

    公开(公告)号：US09551742B2

    公开(公告)日：2017-01-24

    申请号：US13936331

    申请日：2013-07-08

    申请人： Fairchild Semiconductor Corporation

    发明人： Lei Huang

    IPC分类号： G01R31/26 ,  H03K17/082 ,  H01L27/02 ,  G01R19/165

    CPC分类号： G01R31/2621 ,  G01R19/16519 ,  H01L27/0285 ,  H03K17/0822

    摘要： An overcurrent detection circuit for a power switch comprises a sampling circuit and a comparing circuit. The sampling circuit is configured to perform current sampling on the power switch using a sampling Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and an amplifier, convert a sample current into a sample voltage and transmit the sample voltage to the comparing circuit, and clamp operating voltages of the comparing circuit and of an output circuit of the amplifier by a serially connected clamping MOSFET. The comparing circuit is configured to compare the sample voltage with a reference voltage and to output a result of overcurrent detection.

    摘要翻译： 用于电源开关的过电流检测电路包括采样电路和比较电路。 采样电路被配置为使用采样金属氧化物半导体场效应晶体管（MOSFET）和放大器对功率开关进行电流采样，将采样电流转换成采样电压并将采样电压传送到比较电路， 并通过串联钳位MOSFET钳位比较电路和放大器的输出电路的工作电压。 比较电路被配置为将采样电压与参考电压进行比较，并输出过电流检测的结果。

    System for battery management and protection
    36.
    发明授权
    System for battery management and protection 有权
    电池管理和保护系统

    公开(公告)号：US09548604B2

    公开(公告)日：2017-01-17

    申请号：US14293261

    申请日：2014-06-02

    申请人： Fairchild Semiconductor Corporation

    发明人： Tomas Andres Moreno ,  Joseph D. Montalbo ,  Sung Geun Yoon ,  Roger Yeung

    IPC分类号： H02H3/00 ,  H02H3/087 ,  H02H7/18

    CPC分类号： H02H3/087 ,  H01L2224/49171 ,  H02H3/006 ,  H02H7/18

    摘要： The present disclosure is directed to a system for battery management and protection. A battery protection circuit may include a power semiconductor switch and a control integrated circuit (IC). The battery protection circuit may be configured to regulate the charging and/or discharging of a battery and further prevent the battery from operating outside of a safe operating area based on a protection trip point (e.g. overcurrent detection point) of the protection IC. The protection IC may be configured to calibrate a protection trip point so as to compensate for process and temperature variations of on resistance (RSSon) of the power semiconductor switch.

    摘要翻译： 本公开涉及一种用于电池管理和保护的系统。 电池保护电路可以包括功率半导体开关和控制集成电路（IC）。 电池保护电路可以被配置为基于保护IC的保护跳变点（例如过电流检测点）来调节电池的充电和/或放电，并进一步防止电池在安全操作区域外部操作。 保护IC可以被配置为校准保护跳变点，以便补偿功率半导体开关的导通电阻（RSSon）的过程和温度变化。

    DC voltage error protection circuit
    37.
    发明授权
    DC voltage error protection circuit 有权
    直流电压误差保护电路

    公开(公告)号：US09538287B2

    公开(公告)日：2017-01-03

    申请号：US13447448

    申请日：2012-04-16

    申请人： Earl Schreyer

    发明人： Earl Schreyer

    IPC分类号： H04B15/00 ,  H04R3/00

    CPC分类号： H04R3/007

    摘要： This document discusses among other things apparatus and methods for protecting circuit elements from harmful voltages. In an example, an apparatus can include an amplifier configured to receive an input signal and to provide an estimate of a first output signal, a peak detector to receive the estimate and to generate a comparison signal that is active when the amplified input signal exceeds a threshold value, and a timer configured to activate a second output signal if the comparison signal is active for at least a selected time period. The timer can include a first digital input and the selected time period can be set using a state of the first digital input.

    摘要翻译： 本文件还讨论了用于保护电路元件免受有害电压的设备和方法。 在一个示例中，装置可以包括放大器，其被配置为接收输入信号并提供第一输出信号的估计，峰值检测器以接收估计并产生当放大的输入信号超过 阈值，以及定时器，被配置为如果所述比较信号在至少选定的时间段内有效，则激活第二输出信号。 定时器可以包括第一数字输入，并且可以使用第一数字输入的状态来设置所选择的时间段。

    Ground fault circuit interrupter (GFCI) monitor
    38.
    发明授权
    Ground fault circuit interrupter (GFCI) monitor 有权
    接地故障断路器（GFCI）监视器

    公开(公告)号：US09525282B2

    公开(公告)日：2016-12-20

    申请号：US14307051

    申请日：2014-06-17

    申请人： Fairchild Semiconductor Corporation

    发明人： Bruce Armstrong

    IPC分类号： H02H3/16 ,  G01R31/327 ,  H02H3/33

    CPC分类号： H02H3/335 ,  G01R31/3272 ,  H02H3/162 ,  H02H3/334

    摘要： This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.

    摘要翻译： 本文件讨论了一种自检（ST）接地故障电路中断器（GFCI）监视器，其被配置为在第一个交流电源周期的第一个半周期内产生一个模拟接地故障，并延伸到下一个半 - 交流电源的第一周期的周期，其中所述第一交流电力周期的所述第一半周期在所述第一交流电力周期的第二半周期之前。 此外，ST GFCI监视器可以检测到对模拟接地故障的响应。

    Silicon carbide bipolar junction transistor including shielding regions
    39.
    发明授权
    Silicon carbide bipolar junction transistor including shielding regions 有权
    碳化硅双极结晶体管包括屏蔽区域

    公开(公告)号：US09515176B2

    公开(公告)日：2016-12-06

    申请号：US13938006

    申请日：2013-07-09

    申请人： Fairchild Semiconductor Corporation

    发明人： Andrei Konstantinov

    IPC分类号： H01L29/66 ,  H01L29/73 ,  H01L29/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/732 ,  H01L29/06

    CPC分类号： H01L29/73 ,  H01L29/045 ,  H01L29/06 ,  H01L29/0611 ,  H01L29/1004 ,  H01L29/1608 ,  H01L29/66053 ,  H01L29/66068 ,  H01L29/66234 ,  H01L29/7325

    摘要： A silicon carbide (SiC) bipolar junction transistor (BJT) and a method of manufacturing such a SiC BJT is provided. The SiC BJT can include a collector region having a first conductivity type, a base region having a second conductivity type opposite the first conductivity type, and an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack. The emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack. The base region having a portion capped by the emitter region and defining an intrinsic base region where the intrinsic base region includes a portion extending from the emitter region to the collector region. The SiC BJT can include a first shielding region and a second shield region each having the second conductivity type.

    摘要翻译： 提供了碳化硅（SiC）双极结型晶体管（BJT）和制造这种SiC BJT的方法。 SiC BJT可以包括具有第一导电类型的集电极区域，具有与第一导电类型相反的第二导电类型的基极区域和具有第一导电类型的发射极区域，集电极区域，基极区域和发射极区域是 排列成堆叠。 所述发射极区限定至少部分地由所述堆叠顶部的外侧壁限定的升高的结构。 该基极区域具有由发射极区域覆盖的部分并且限定本征基极区域，其中本征基极区域包括从发射极区域延伸到集电极区域的部分。 SiC BJT可以包括具有第二导电类型的第一屏蔽区域和第二屏蔽区域。

    Silicon-carbide trench gate MOSFETs
    40.
    发明授权
    Silicon-carbide trench gate MOSFETs 有权
    碳化硅沟槽栅极MOSFET

    公开(公告)号：US09466709B2

    公开(公告)日：2016-10-11

    申请号：US14744958

    申请日：2015-06-19

    申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

    发明人： Andrei Konstantinov

    IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L29/423 ,  H01L29/10 ,  H01L29/167

    CPC分类号： H01L29/7813 ,  H01L21/046 ,  H01L21/049 ,  H01L29/1037 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/4236 ,  H01L29/66068

    摘要： In a general aspect, an apparatus can include a semiconductor substrate, a drift region disposed in the semiconductor substrate; a body region disposed in the drift region and a source region disposed in the body region. The apparatus can also include a gate trench disposed in the semiconductor substrate. The apparatus can further include a gate dielectric disposed on a sidewall and a bottom surface of the gate trench, the gate dielectric on the sidewall defining a first interface with the body region and the gate dielectric on the bottom surface defining a second interface with the body region. The apparatus can still further include a gate electrode disposed on the gate dielectric and a lateral channel region disposed in the body region, the lateral channel region being defined along the second interface.

    摘要翻译： 在一般方面，一种装置可以包括半导体衬底，设置在半导体衬底中的漂移区; 设置在所述漂移区域中的身体区域和设置在所述身体区域中的源区域。 该装置还可以包括设置在半导体衬底中的栅极沟槽。 该设备还可以包括设置在栅极沟槽的侧壁和底表面上的栅极电介质，侧壁上的栅极电介质限定与主体区域的第一界面，底表面上的栅极电介质限定与主体的第二界面 地区。 该装置还可以包括设置在栅极电介质上的栅电极和设置在主体区域中的横向沟道区，沿着第二界面限定横向沟道区。