公开(公告)号：US20030146453A1

公开(公告)日：2003-08-07

申请号：US10377985

申请日：2003-03-03

申请人： International Business Machines Corporation

发明人： Armin Beck ,  Tilman A. Beierlein ,  Peter Mueller ,  Heike Riel ,  Walter Heinrich Riess

IPC分类号： H01L031/0328

CPC分类号： H01L27/3281 ,  H01L51/5212 ,  Y10S257/918

摘要： An organic light emitting device has a layer structure comprising: a first electrode layer (20); a second electrode layer (40) parallel to the first electrode layer (20); and, an electrically conductive and light transmissive layer (70) parallel to the second electrode layer. An electrically insulating layer (30) is disposed between the first and second electrode layers. A layer of organic material (50) is disposed between the second electrode layer and the conductive layer. An aperture (60) in the organic layer provides an electrical connection path between the conductive layer and one of the first and second electrode layers.

公开(公告)号：US06566688B1

公开(公告)日：2003-05-20

申请号：US09856799

申请日：2001-05-24

申请人： Yong-Hang Zhang ,  Philip Dowd ,  Wolfgang Braun

发明人： Yong-Hang Zhang ,  Philip Dowd ,  Wolfgang Braun

IPC分类号： H01L2715

CPC分类号： B82Y20/00 ,  H01S5/0211 ,  H01S5/12 ,  H01S5/125 ,  H01S5/18308 ,  H01S5/18311 ,  H01S5/18313 ,  H01S5/2063 ,  H01S5/3211 ,  H01S5/32358 ,  H01S5/3403 ,  H01S5/3422 ,  H01S5/3425 ,  H01S5/34306 ,  H01S5/34313 ,  H01S5/3434 ,  H01S2302/00 ,  Y10S257/918

摘要： A compound semiconductor device is provided that includes a substrate and an active region disposed above the substrate. The active region includes at least two different pseudomorphic layers, the first layer having the form InxGa1−xPyAszSb1−y−z, and the second layer having the form InqGa1−qPrAssSb1−r−s. The first layer includes at least In, Ga, and As, and the second layer includes at least Ga, As, and Sb. It is preferable for the substrate to be GaAs or AlpGa1−pAs (0

摘要翻译： 提供了一种复合半导体器件，其包括衬底和设置在衬底上方的有源区。 有源区包括至少两个不同的假晶层，第一层具有In x Ga 1-x P y As z Sb 1-y-z形式，第二层具有InqGa1-qPrAssSb1-r-s形式。 第一层至少包括In，Ga和As，第二层至少包括Ga，As和Sb。 衬底优选为GaAs或AlpGa1-pAs（0

公开(公告)号：US20020149019A1

公开(公告)日：2002-10-17

申请号：US10108180

申请日：2002-03-27

发明人： Setsuya Iwashita ,  Takamitsu Higuchi ,  Hiromu Miyazawa

IPC分类号： H01L029/04

CPC分类号： H01L21/02197 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/31691 ,  H01L28/56 ,  H03H9/02574 ,  H03H9/174 ,  Y10S257/918

摘要： Performance of an electronic device is highly improved by epitaxially growing a perovskite-type oxide thin film on an inorganic amorphous layer or an organic solid layer in a desired direction; and furthermore, a high performance electronic device is provided by incorporating the electronic device into an integrated circuit, wherein oxide thin layers are formed on the inorganic amorphous layer or the organic solid layer, and the perovskite-type oxide thin film is grown epitaxially on the oxide layer, the oxide thin layers being able to be at least one of strontium oxide, magnesium oxide, cerium oxide, zirconium oxide, yttrium stabilized zirconium oxide, and strontium titanate; and as the perovskite-type oxide thin film, the perovskite-type oxide thin film being a piezoelectric or ferroelectric material, for example, is used.

摘要翻译： 通过在无机非晶层或有机固体层上沿期望的方向外延生长钙钛矿型氧化物薄膜，高度改善电子器件的性能; 此外，通过将电子器件结合到集成电路中提供高性能电子器件，其中在无机非晶层或有机固体层上形成氧化物薄层，并且钙钛矿型氧化物薄膜外延生长在 氧化物薄层可以是氧化锶，氧化镁，氧化铈，氧化锆，钇稳定的氧化锆和钛酸锶中的至少一种; 作为钙钛矿型氧化物薄膜，例如使用作为压电体或铁电体材料的钙钛矿型氧化物薄膜。

公开(公告)号：US20020134985A1

公开(公告)日：2002-09-26

申请号：US10143985

申请日：2002-05-14

发明人： Tzer-Perng Chen ,  Chih-Sung Chang ,  Holin Chang

IPC分类号： H01L031/12

CPC分类号： H01L33/22 ,  H01L33/02 ,  Y10S257/918

摘要： The present invention discloses a light-emitting device (LED) with a textured interface formed by utilizing holographic lithography. Two coherent light beams are overlaid to cause constructive and destructive interference and thereby periodical alternative bright and dark lines are formed. A wafer coated with a photoresist material is exposed under the interference lines. After a developing step, a photoresist pattern with textured surface is formed on the wafer. Thereafter, the textured photoresist pattern is transferred to the wafer by etching process and result in a desired light-emitting device with a textured interface.

摘要翻译： 本发明公开了一种具有通过利用全息光刻形成的纹理界面的发光器件（LED）。 两个相干光束被叠加以引起相当大的和相消的干涉，从而形成周期性的替代的明暗线。 涂覆有光致抗蚀剂材料的晶片在干涉线下暴露。 在显影步骤之后，在晶片上形成具有纹理表面的光致抗蚀剂图案。 此后，通过蚀刻工艺将织构化的光致抗蚀剂图案转移到晶片，并产生具有纹理界面的期望的发光器件。

公开(公告)号：US20020130329A1

公开(公告)日：2002-09-19

申请号：US10046319

申请日：2002-01-16

发明人： Yukio Furukawa

IPC分类号： H01L033/00

CPC分类号： H01L31/125 ,  G02B6/12004 ,  H01L27/15 ,  H01L31/02327 ,  Y10S257/918

摘要： The optical semiconductor apparatus is provided with a surface light-emitting device and a surface light-receiving device, and includes an active layer, a first spacer layer, and a first semiconductor multi-layer mirror. The active layer, the first spacer layer, and the first semiconductor multi-layer mirror are layered in a layering direction. A first region of the surface light-emitting device and a second region of the surface light-receiving device are arranged in a direction approximately perpendicular to the layering direction, the first region is electrically separated from the second region substantially, and the first spacer layer in the first region and the first spacer layer in the second region are subjected to different oxidization including non-oxidization, respectively, such that resonators composed of the first semiconductor multi-layer mirror and the first spacer layer in the surface light-emitting device and the surface light-receiving device have different wavelength dependencies of reflectivity, respectively.

摘要翻译： 光学半导体装置设置有表面发光器件和表面光接收器件，并且包括有源层，第一间隔层和第一半导体多层反射镜。 有源层，第一间隔层和第一半导体多层反射镜在层叠方向上层叠。 表面发光器件的第一区域和表面光接收器件的第二区域沿大致垂直于分层方向的方向布置，第一区域基本上与第二区域电分离，并且第一间隔层 在第一区域和第二区域中的第一间隔层分别进行包括非氧化的不同氧化，使得在表面发光器件中由第一半导体多层反射镜和第一间隔层组成的谐振器，以及 表面光接收装置分别具有不同的反射率的波长依赖性。

公开(公告)号：US20020054616A1

公开(公告)日：2002-05-09

申请号：US10011552

申请日：2001-11-06

发明人： Satoshi Kamiyama ,  Masakatsu Suzuki ,  Takeshi Uenoyama ,  Kiyoshi Ohnaka ,  Akira Takamori ,  Masaya Mannoh ,  Isao Kidoguchi ,  Hideto Adachi ,  Akihiko Ishibashi ,  Toshiya Fukuhisa ,  Yasuhito Kumabuchi

IPC分类号： H01S005/00

CPC分类号： B82Y20/00 ,  H01L33/16 ,  H01L33/32 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/02272 ,  H01S5/2068 ,  H01S5/2201 ,  H01S5/2232 ,  H01S5/2237 ,  H01S5/24 ,  H01S5/3201 ,  H01S5/3202 ,  H01S5/3203 ,  H01S5/32308 ,  H01S5/32341 ,  H01S5/3403 ,  H01S5/34333 ,  H01S2301/173 ,  H01S2304/04 ,  H01S2304/12 ,  Y10S257/918 ,  Y10T428/12528

摘要： The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.

摘要翻译： 本发明的半导体激光器包括在c轴方向上形成的有源层，其中有源层由六方晶系化合物半导体制成，并且在有源层的c平面内产生各向异性应变。

公开(公告)号：US06337493B1

公开(公告)日：2002-01-08

申请号：US09553062

申请日：2000-04-20

申请人： Koji Tanizawa ,  Hiroki Narimatsu ,  Tomoaki Sakai ,  Tomotsugu Mitani

发明人： Koji Tanizawa ,  Hiroki Narimatsu ,  Tomoaki Sakai ,  Tomotsugu Mitani

IPC分类号： H01L2715

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/04 ,  H01L33/06 ,  H01L33/14 ,  H01S5/34333 ,  Y10S257/918

摘要： A nitride semiconductor device comprising an n-type nitride semiconductor layer, an active layer having a quantum well structure including a well layer of a nitride semiconductor containing In, the p-type nitride semiconductor layer having a p-type contact layer, a p-type high concentration doped layer interposed between said active layer and said p-type contact layer and a p-type multi-film layer interposed between said active layer and said p-type high concentration doped layer.

摘要翻译： 一种氮化物半导体器件，包括n型氮化物半导体层，具有量子阱结构的有源层，包括含有In的氮化物半导体的阱层，具有p型接触层的p型氮化物半导体层， 插入在所述有源层和所述p型接触层之间的p型高浓度掺杂层和插入在所述有源层和所述p型高浓度掺杂层之间的p型多层膜。

公开(公告)号：US5315272A

公开(公告)日：1994-05-24

申请号：US51896

申请日：1993-04-26

申请人： William E. VonWicklen

发明人： William E. VonWicklen

IPC分类号： H01L33/00 ,  H01L33/34 ,  H03B7/08 ,  H03B7/00 ,  H05B37/00

CPC分类号： H01L33/34 ,  H01L33/0008 ,  H03B7/08 ,  Y10S257/918

摘要： A light emitting tunnel diode oscillator comprising a body of single crystalline material having a first portion n-doped and a second portion p-doped in such a way that the resulting p-n junction has the low voltage conductance characteristics of a tunnel diode as well as characteristics of light emission.The light emitting tunnel diode oscillator comprises a plurality of alternately layered n-doped portions and p-doped portions.a light emitting tunnel diode oscillator wherein said first n-doped portion and said second p-doped portion are formed to have a thickness corresponding to an integral number of desired wave lengths.

摘要翻译： 一种发光隧道二极管振荡器，包括具有第一部分n掺杂的单晶材料体和p掺杂的第二部分，使得所得到的pn结具有隧道二极管的低电压电导特性以及特性 的发光。 发光隧道二极管振荡器包括多个交替层叠的n掺杂部分和p掺杂部分。 发光隧道二极管振荡器，其中所述第一n掺杂部分和所述第二p掺杂部分形成为具有对应于期望波长的整数的厚度。

公开(公告)号：US4811071A

公开(公告)日：1989-03-07

申请号：US096218

申请日：1987-09-08

申请人： Herbert F. Roloff

发明人： Herbert F. Roloff

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/74 ,  H01L21/761 ,  H01L29/08 ,  H01L29/732 ,  H01L29/72

CPC分类号： H01L21/761 ,  H01L21/74 ,  H01L29/0826 ,  H01L29/7322 ,  Y10S257/918

摘要： Vertical transistor structure with an epitaxially applied layer of the second conduction type on a semiconductor substrate of the first conduction type, in which a tray is formed by insulating walls of the first conduction type extending into the semiconductor substrate. A first highly doped buried layer of the second conduction type in which a second buried layer of the first conduction type extending into the epitaxial layer of the first conduction type is embedded insulated from the semiconductor substrate. Three doped zones of which one, of the second conduction type, is provided for the base terminal and one of the first conduction type for the emitter and collector terminal, and a zone connecting the collector terminal zone and the second buried layer, of the first conduction type, where these regions form the collector. The emitter zone and the collector terminal zone are arranged above opposite end regions of the second buried layer.

摘要翻译： 在第一导电类型的半导体衬底上具有第二导电型外延层的垂直晶体管结构，其中通过延伸到半导体衬底中的第一导电类型的绝缘壁形成托盘。 第二导电类型的第一高掺杂掩埋层，其中延伸到第一导电类型的外延层的第一导电类型的第二掩埋层被嵌入与半导体衬底绝缘。 三个掺杂区域，其中第二导电类型中的一个为基极端子提供一个，第一导电类型中的一个用于发射极和集电极端子，以及连接集电极端子区域和第二掩埋层的区域，第一 导电类型，其中这些区域形成收集器。 发射极区域和集电极端子区域布置在第二掩埋层的相对端区域的上方。

公开(公告)号：US4705322A

公开(公告)日：1987-11-10

申请号：US752128

申请日：1985-07-05

申请人： Aristides A. Yiannoulos

发明人： Aristides A. Yiannoulos

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8222 ,  H01L27/02 ,  H01L27/06 ,  H01L29/73 ,  H03K17/0814 ,  H03K17/082 ,  H03K17/695 ,  H02H3/20

CPC分类号： H01L29/7302 ,  H01L27/0248 ,  H03K17/08146 ,  H03K17/0826 ,  Y10S257/918

摘要： An arrangement for protecting inductive load switching transistors during overvoltage conditions is disclosed. The arrangement comprises a Zener diode coupled between the collector and base of the switching transistor, where the Zener diode will break down during inductive load-created overvoltage conditions and turn on the transistor. A major portion of the surge current will then flow through the activated transistor. In a particular integrated circuit realization of the arrangement, the Zener diode is formed in the same semiconductor area as the transistor by extending a portion of the base diffusion region downward to contact the buried collector region.

摘要翻译： 公开了一种用于在过电压条件下保护感性负载开关晶体管的装置。 该装置包括耦合在开关晶体管的集电极和基极之间的齐纳二极管，其中齐纳二极管将在感性负载产生的过压条件下分解并导通晶体管。 然后，浪涌电流的主要部分将流过激活的晶体管。 在该布置的特定集成电路实现中，通过将基极扩散区域的一部分向下延伸以接触埋藏的集电极区域，齐纳二极管形成在与晶体管相同的半导体区域中。