摘要:
A light-emitting diode includes a substrate, a compound semiconductor layer including a p-n junction-type light-emitting part formed on the substrate, an electric conductor disposed on the compound semiconductor layer and formed of an electrically conductive material optically transparent to the light emitted from the light-emitting part and a high resistance layer possessing higher resistance than the electric conductor and provided in the middle between the compound semiconductor layer and the electric conductor. In the configuration of a light-emitting diode lamp, the electric conductor and the electrode disposed on the semiconductor layer on the side opposite to the electric conductor across the light-emitting layer are made to assume an equal electric potential by means of wire bonding. The light-emitting diode abounds in luminance and excels in electrostatic breakdown voltage.
摘要:
Techniques and devices are described to use spatially-varying curvature information of a layered structure to determine stresses at each location with non-local contributions from other locations of the structure. For example, a local contribution to stresses at a selected location on a layered structure formed on a substrate is determined from curvature changes at the selected location and a non-local contribution to the stresses at the selected location is also determined from curvature changes at all locations across the layered structure. Next, the local contribution and the non-local contribution are combined to determine the total stresses at the selected location. Techniques and devices for determining a misfit strain between a film and a substrate on which the film is deposited are also described.
摘要:
A SiGe spacer layer 151, a graded SiGe base layer 152 including boron, and an Si-cap layer 153 are sequentially grown through epitaxial growth over a collector layer 102 on an Si substrate. A second deposited oxide film 112 having a base opening portion 118 and a P+ polysilicon layer 115 that will be made into an emitter connecting electrode filling the base opening portion are formed on the Si-cap layer 153, and an emitter diffusion layer 153a is formed by diffusing phosphorus into the Si-cap layer 153. When the Si-cap layer 153 is grown, by allowing the Si-cap layer 153 to include boron only at the upper part thereof by in-situ doping, the width of a depletion layer 154 is narrowed and a recombination current is reduced, thereby making it possible to improve the linearity of the current characteristics.
摘要:
The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then formed on the gate dielectric. A pair of source/drain regions formed from a wide bandgap semiconductor film or a metal is formed on opposite sides of the gate electrode and adjacent to the low bandgap semiconductor film.
摘要:
The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then formed on the gate dielectric. A pair of source/drain regions formed from a wide bandgap semiconductor film or a metal is formed on opposite sides of the gate electrode and adjacent to the low bandgap semiconductor film.
摘要:
The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then formed on the gate dielectric. A pair of source/drain regions formed from a wide bandgap semiconductor film or a metal is formed on opposite sides of the gate electrode and adjacent to the low bandgap semiconductor film.
摘要:
A method produces structures for semiconductor components, particularly BH laser diodes, in which a mask material is applied to a sample in a masking step. The etch rate in an etching step depends upon the composition and/or nature of the mask material. The etch rate is selected in such a way so that the mask is at least partly dissolved during the etching step. It is therefore possible to easily remove the mask from the semiconductor material and apply additional layers in situ during the fabrication of semiconductor components.
摘要:
A method for growing InxGa1−xAs epitaxial layer on a lattice mismatched InP substrate calls for depositing by organo-metallic vapor phase epitaxy, or other epitaxial layer growth technique, a plurality of discreet layers of InAsyP1−y over an InP substrate. These layers provide a buffer. Each succeeding buffer layer has a distinct composition which produces less than a critical amount of lattice mismatch relative to the preceding layer. An InxGa1−xAs epitaxial layer is grown over the buffer wherein 0.53≦x≦0.76. A resulting InGaAs structure comprises an InP substrate with at least one InAsP buffer layer sandwiched between the substrate and the InGaAs epitaxial layer. The buffer layer has a critical lattice mismatch of less than 1.3% relative to the substrate. Additional buffer layers will likewise have a lattice mismatch of no more than 1.3% relative to the preceding layer. The number of buffer layers is determined by the resulting bandgap desired in the InGaAs epitaxial layer, which, in turn, determines the composition of the InxGa1−xAs epitaxial layer, and thus, the lattice mismatch.
摘要翻译:在晶格失配的InP衬底上生长In x Ga 1-x As外延层的方法要求通过有机金属气相外延或其它外延层生长技术在InP衬底上沉积多个离散的InAsyP1-y层。 这些层提供了一个缓冲区。 每个后续缓冲层具有相对于前一层产生小于临界量的晶格失配的不同组成。 In x Ga 1-x As外延层生长在缓冲器上,其中0.53≤x≤0.76。所得的InGaAs结构包括InP衬底,其具有夹在衬底和InGaAs外延层之间的至少一个InAsP缓冲层。 缓冲层相对于衬底具有小于1.3%的临界晶格失配。 附加的缓冲层同样具有相对于前一层不超过1.3%的晶格失配。 缓冲层的数量由InGaAs外延层中所需的所得到的带隙确定,InGaAs外延层决定了In x Ga 1-x As外延层的组成,从而确定晶格失配。
摘要:
A semiconductor light-emitting device has a light-emitting section comprised of at least a lower clad layer, an active layer and an upper clad layer which are formed on a compound semiconductor substrate and a layer grown on the upper clad layer of the light-emitting section. When growing the current diffusion layer from a crystal interface on the upper clad layer in a lattice mismatching state in which the absolute value of a lattice matching factor &Dgr;a/a is not lower than 0.25% with respect to the upper clad layer at a crystal interface where the crystal composition changes on the upper clad layer of the light-emitting section, the growth rate at least at the start time of growth is made to be 1.0 &mgr;m/h or less.